PEX8749, PCI Express Gen 3 Switch, 48 Lanes, 18 Ports

© PLX Technology, www.plxtech.com

Page 2 of 5

22Aug11, version 1.0

CPU

CPU

Primary Host

Primary Host

CPU

CPU

Primary Host

Primary Host

Root

Complex

Root

Complex

Root

Complex

Root

Complex

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

End

Point

PEX 8749

PEX 8749

NT

CPU

CPU

Secondary Host

Secondary Host

CPU

CPU

Secondary Host

Secondary Host

Non-Transparent

Port

Figure 3. Non-Transparent Port

The PEX8749 can also be configured in Multi-Host mode

where users can choose up to six ports as host/upstream

ports and assign a desired number of downstream ports to

each host. In Multi-Host mode, a virtual switch is created

for each host port and its associated downstream ports

inside the device. The traffic between the ports of a virtual

switch is completely isolated from the traffic in other

virtual switches. Figure 2 illustrates some configurations

of the PEX8749 in Multi-Host mode where each ellipse

represents a virtual switch inside the device.

The PEX8749

also provides

several ways to

configure its

registers. The

device can be

configured

through

strapping pins,

I

host software, or

an optional

serial EEPROM.

This allows for

easy debug

during the

development phase, performance monitoring during the

operation phase, and driver or software upgrade.

Dual-Host & Failover Support

In Single-Host mode, the PEX8749 supports 2 Non-

Transparent (NT) Ports,

which enables the

implementation of

dual-host systems for

redundancy and host

failover capability. The

NT port allows systems

to isolate host memory

domains by presenting

the processor

subsystem

as an endpoint rather

than another memory

system. Base address registers are used to translate

addresses; doorbell registers are used to send interrupts

between the address domains; and scratchpad registers

(accessible by both CPUs) allow inter-processor

communication (see Figure 3).

Multi-Host & Failover Support

In Multi-Host mode, PEX8749 can be configured with up

to six upstream host ports, each with its own dedicated

downstream ports. The device can be configured for 1+1

redundancy or N+1 redundancy. The PEX8749 allows the

hosts to communicate their status to each other via special

door-bell registers. In failover mode, if a host fails, the

host designated for failover will disable the upstream port

attached to the failing host and program the downstream

ports of that host to its own domain. Figure 4a shows a two

host system in Multi-Host mode with two virtual switches

inside the device and Figure 4b shows Host 1 disabled

after failure and Host 2 having taken over all of Host 1’s

end-points.

Hot-Plug for High Availability

Hot-plug capability allows users to replace hardware

modules and perform maintenance without powering down

the system. The PEX8749 hot plug capability feature

makes it suitable for High Availability (HA)

applications. Three downstream ports include a Standard

Hot Plug Controller. If the PEX8749 is used in an

application where one or more of its downstream ports

connect to PCI Express slots, each port’s Hot-Plug

Controller can be used to manage the hot-plug event of its

associated slot. Every port on the PEX8749 is equipped

with a hot-plug control/status register to support hot-plug

capability through external logic via the I

SerDes Power and Signal Management

The PEX8749 provides low power capability that is fully

compliant with the PCIe power management specification

and supports software control of the SerDes outputs to

allow optimization of power and signal strength in a

system. Furthermore, the SerDes block supports loop-back

modes and advanced reporting of error conditions,

which enables efficient management of the entire system.

Interoperability

The PEX8749 is designed to be fully compliant with the

PCI Express Base Specification r3.0, and is backwards

compatible to PCI Express Base Specification r2.0, r1.1,

Figure 2. Multi-Host Port Configurations

PEX 8749

PEX 8749

PEX 8749

PEX 8749

x8

3 x8

x8

PEX 8749

PEX 8749

PEX 8749

PEX 8749

x8

2 x4

2 x8

x4

x4

2 x4

PEX 8749

PEX 8749

PEX 8749

PEX 8749

8 x4s

4 x4s

PEX 8749

PEX 8749

PEX 8749

PEX 8749

9 x2s

3 x2s

2 x4

2 x4s

4 x4s