PEX8749 datasheet(4/5 Pages) PLX

4 / 5 page

PEX 8749, PCI Express Gen 3 Switch, 48 Lanes, 18 Ports

Page 4 of 5

22Aug11, version 1.0

Error Injection & SerDes Loopback

Using the PEX8749’s Error Injection feature, users can

inject malformed packets and/or fatal errors into their

system and evaluate a system’s ability to detect and

recover from such errors. The PEX8749 also supports

Internal Tx, External Tx, Recovered Clock, and Recovered

Data Loopback modes.

Applications

Suitable for host-centric as well as peer-to-peer traffic

patterns, the PEX8749 can be configured for a wide

variety of form factors and applications.

Host Centric Fan-out

The PEX8749, with its symmetric or asymmetric lane

configuration capability, allows user-specific tuning to a variety

of host-centric applications. Figure 6 shows a server design

where, in a quad or multi processor system, users can assign

endpoints/slots to CPU cores to distribute the system load. The

packets directed to different CPU cores will go to different (user

assigned) PEX8749

upstream ports,

allowing better

queuing and load

balancing

capability for

higher

performance.

Conversely, the

PEX8749 can

also be used in

single-host mode

to simply fan-out

to endpoints.

Figure 6. Host Centric Dual Upstream

Multi-Host Systems

In multi-host mode, the PEX8749 can be shared by up to six

hosts in a

system. By

creating six

virtual

switches, the

PEX8749

allows six

hosts to fan-

out to their

respective

endpoints.

This reduces

the number

Figure 7. Multi-Host System

of switches required for fan-out, saving precious board

space and power consumption. In Figure 7, the PEX8749

is being shared by four different servers (hosts)

with each server is running its own applications (I/Os).

The PEX8749 assigns the endpoints to the appropriate host

and isolates them from the other hosts.

Host Failover

The PEX8749 can also be utilized in applications where

host failover is required. In the below application (Figure

8), two hosts may be active simultaneously and controlling

their own domains while exchange status information

through doorbell registers or I

2C interface. The devices can

be programmed to trigger fail-over if the heartbeat

information is not provided.

In the event of a failure, the

surviving device will reset

the endpoints connected to

the failing CPU and

enumerate them in its own

domain without impacting

the operation of endpoints

already in its domain.

Figure 8. Host Fail-Over

N+1 Fail-Over in Storage Systems

The PEX8749’s Multi-Host feature can also be used to

develop storage array clusters where each host manages a

set of storage devices independent of others (Figure 9).

Users can designate one of the hosts as the failover-host

for all the other hosts while actively managing its own

endpoints. The failover-host will communicate with other

hosts for status/heartbeat information and execute a

failover event if/when it gets triggered.

Figure 9. N+1 Failover

CPU

PEX 8749

8 Disk Chassis

PEX 8712

8 Disk Chassis

PEX 8712

CPU

8 Disk Chassis

PEX 8712

8 Disk Chassis

PEX 8712

8 Disk Chassis

PEX 8716

8 Disk Chassis

PEX 8716

8 Disk Chassis

PEX 8716

Memory

CPU

Memory

CPU

x4s

x8s

x1s

SATA

Endpoint

PCIe Gen1, Gen2, or Gen3 slots

PEX 8749

PCI

PCH

I/O

PEX 8749

I/O

Mem

CPU

PCH

I/Os

Mem

CPU

PCH

I/Os

Mem

CPU

PCH

I/Os

Mem

CPU

PCH

I/Os

Mem

CPU

PCH

I/Os

Mem

CPU

PCH

I/Os

Mem

CPU

PCH

I/Os

Mem

CPU

PCH

I/Os

CPU

PEX 8749

CPU

PEX 8749

x8s

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