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ESDS312 数据表(PDF) 9 Page - Texas Instruments |
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ESDS312 数据表(HTML) 9 Page - Texas Instruments |
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9 / 21 page ![]() Ethernet PHY TP1+ TP1- TP2+ TP2- TP3+ TP3- TP4+ TP4- RJ-45 Connector ESDS314 ESDS314 9 ESDS312, ESDS314 www.ti.com SLVSEG9B – MAY 2018 – REVISED SEPTEMBER 2018 Product Folder Links: ESDS312 ESDS314 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The ESDS314, ESDS312 devices are diode type TVS which is used to provide a path to ground for dissipating surge and ESD events on high-speed signal lines between a human interface connector and a system. As the current from surge or ESD passes through the TVS, only a small voltage drop is present across the diode. This is the voltage presented to the protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a safe level for the protected IC. 8.2 Typical Application Figure 13. ESDS314 Protecting the Ethernet 1Gbps Interface 8.2.1 Design Requirements A typical operation for the ESDS314 would be protecting a high speed dataline similar to one shown in Figure 13. In this example, the ESDS314 is protecting an Ethernet PHY's data lines that has a nominal operating voltage of 3.6 V. Many of the Ethernet interfaces that connect to long cables require protection against ±1 kV surge test through a 42-Ω coupling resistor and a 0.5 µF capacitor, equaling roughly 24 A of surge current. Without any input protection, if a surge event is caused by lightning, coupling, ringing, or any other fault condition, this input voltage will rise to hundreds of volts for multiple microseconds, harming the device. For Ethernet 1000Base-T (1Gbps), application design parameters listed in Table 1 are known. Table 1. Design Parameters DESIGN PARAMETER VALUE Signal range on differential data line pairs 0 to 3.6 V Operating frequency 125 MHz |
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