AD9520-5 datasheet(23/74 Pages) AD

23 / 74 page

Data Sheet

AD9520-5

Rev. B | Page 23 of 74

Figure 22. Additive (Residual) Phase Noise, CLK-to-CMOS at 50 MHz,

Divide-by-20

Figure 23. Additive (Residual) Phase Noise, CLK-to-CMOS at

250 MHz, Divide-by-4

Figure 24. Phase Noise (Absolute), External VCXO (Toyocom TCO-2112)

at 245.76 MHz; PFD = 15.36 MHz; LBW = 250 Hz; LVPECL Output = 245.76 MHz

Figure 25. Telcordia GR-253 Jitter Tolerance Plot

–110

–120

–130

–140

–150

–170

–160

100

100M

10M

100k

10k

FREQUENCY (Hz)

–100

–110

–120

–130

–140

–150

–160

100

100M

10M

100k

10k

FREQUENCY (Hz)

100M

10M

100k

10k

FREQUENCY (Hz)

–120

–160

–150

–140

–130

1000

100

0.1

0.01

0.1

100

1000

JITTER FREQUENCY (kHz)

OC-48 OBJECTIVE MASK

AD9520

fOBJ

NOTE: 375UI MAX AT 10Hz OFFSET IS THE

MAXIMUM JITTER THAT CAN BE

GENERATED BY THE TEST EQUIPMENT.

FAILURE POINT IS GREATER THAN 375UI.

AD9520-5 数据表(PDF) 23 Page - Analog Devices

AD9520-5 数据表(HTML) 23 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

数据表下载

链接网址

AD9520-5 数据表(PDF) 23 Page - Analog Devices

AD9520-5 数据表(HTML) 23 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

数据表 下载

链接网址

数据表下载