Pin

Pin Name

Description

1

VDD

5V Digital Supply

2

RNC

Read/Not Convert Input – A high-to-low transition initiates an A-to-D conversion.

When held low, the outputs are in a high impedance mode.

3

NCS

Not Chip Select Input – A low input will select the chip and enable the outputs.

A high input will de-select the chip and place the outputs in a high impedance state.

4

NAP

Power down control (digital input). A low input for normal operation.

A high input for power down mode.

5

VDDA

5V Analog Supply

6

VREF

VREF Buffered Output. Nominally 2.5V buffered output of on-chip voltage reference. This signal is also

connected internally to the Capacitor DAC reference input. This signal should be left open on the board.

7

BUFFIN

Analog Buffer Amp Input – This is the input to the unity gain buffer amplifier.

8

BUFFOUT

Unity Gain Buffer Output. Unity gain buffer output based on the BUFFIN signal.

9

VIN ADC

ADC Signal Input.

10

VSSA

Analog Ground

11

SDO

Serial Data Output – Digital data output. This is a tri-state output driver.1

12

SCLK

Serial Clock Input – This signal is used to clock out the serial digital data.

13

STS

Status Output – A low signal indicates the conversion is complete and the data is available at the outputs.

A high signal indicates a conversion is in process.

14

VSS

Digital Ground

14 Lead Package Block and PIN Diagrams

(1) The data outputs may be put into a high impedance state according to truth table.

2

Pin Description