IMON

VIN

VOUT

IIN

16

TPS1663

SLVSET9A – SEPTEMBER 2018 – REVISED OCTOBER 2018

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Copyright © 2018, Texas Instruments Incorporated

Feature Description (continued)

Figure 8. IMON Response During a Load Step

8.3.8 FAULT Response (FLT)

The FLT open-drain output asserts (active low) under the faults events such as undervoltage, overvoltage, over

load, power limiting, reverse current and thermal shutdown conditions. The device is designed to eliminate false

reporting by using an internal "de-glitch" circuit for fault conditions without the need for an external circuitry. FLT

can be left open or connected to GND when not used.

8.3.9 IN, P_IN, OUT and GND Pins

Connect a minimum of 0.1 uF capacitor across IN and GND. Connect P_IN and IN together. Do not leave any of

the IN and OUT pins un-connected.

8.3.10 Thermal Shutdown

The device has a built-in overtemperature shutdown circuitry designed to protect the internal FET, if the junction

shutdown, the fault pin FLT pulls low to indicate a fault condition.

8.3.11 Low Current Shutdown Control (SHDN)

The internal and the external FET and hence the load current can be switched off by pulling the SHDN pin below

0.8 V threshold with a micro-controller GPIO pin or can be controlled remotely with an opto-isolator device. The

device quiescent current reduces to 22 μA (typical) in shutdown state. To assert SHDN low, the pull down must

sink at least 10 µA at 400 mV. To enable the device, SHDN must be pulled up to atleast 2 V. Once the device is

enabled, the internal FET turns on with dVdT mode.

8.4 Device Functional Modes

The TPS1663x devices respond differently to overload with MODE pin configurations. The operational

differences are explained in Table 1.

Table 1. Device Operational Differences Under Different MODE Configurations

MODE Pin Configuration

Overload Protection Operation

Open

Latch reset by toggling SHDN low to high or power cycling IN

Shorted to GND