3

U4256BM-R

4562C–AUDR–08/04

Functional

Description

For a tuned FM-broadcast receiver, the following parts are needed:

•

Voltage-Controlled Oscillator (VCO)

•

Antenna Amplifier Tuned Circuit

•

RF Amplifier Tuned Circuit

Typical modern receivers with electronic tuning are tuned to the desired FM frequency

by the frequency synthesizer IC U4256BM-R. The special design allows the user to

build software-controlled tuner alignment systems. Two programmable DACs (Digital-to-

Analog Converter) support the computer-controlled alignment. The output of the PLL is

a tuning voltage which is connected to the VCO of the receiver IC. The output of the

VCO is equal to the desired station frequency plus the IF (10.7 MHz). The RF and the

oscillator signal (VCO) are both input to the mixer that translates the desired FM chan-

nel signal to the fixed IF signal. For FM, the double-conversion system of the receiver

requires exactly 10.7 MHz for the first IF frequency, which determines the center fre-

quency of the software-controlled integrated second IF filter.

If this oscillator tuning feature is not used, the internal capacities have to be switched off

and the oscillator has to be operated with high-quality external capacities to ensure that

the operational frequency is exactly 10.250 MHz.

When dimensioning the oscillator circuit, it is important that the additional capacities

enable the oscillator to operate through its complete tracking range. The oscillating abil-

ity depends very strongly on the used crystal oscillator. Initializing the oscillator should

be established without switching any additional capacities to guarantee that the oscilla-

tor starts to operate properly. Due to the lower quality of the integrated capacities

compared to discrete capacities, the amount of the switched integrated capacities

should always be minimized. (If necessary reduce tracking range or use another crystal

oscillator.)

The U4256BM-R has a very fast response time of maximum 800 µs (at 2 mA,

f

one supply voltage is necessary, due to a integrated band gap.

Input/Output

Interface Circuits

PDO (Pin 1)

PDO is the buffer amplifier output of the PLL. The bipolar output stage is a rail-to-rail

amplifier.

PD (Pin 2)

PD is the current charge pump output of the PLL. The current can be controlled by

setting the Bits. The loop filter has to be designed corresponding to the choosen pump

current and the internal reference frequency. A recommendation can be found in the

application circuit.

The charge-pump current can be choosen by setting the Bits 71 and

IPD (µA)

B71

B70

25

0

0

100

0

1

500

1

0

2000

1

1