Data Sheet

AD5629R/AD5669R

Rev. F | Page 27 of 30

Table 13. 32-Bit Input Shift Register Contents for Power-Down/Power-Up Function

MSB

LSB

DB23

DB22

DB21

DB20

DB19 to DB16

DB15 to DB10

DB9

DB8

DB7 to DB1

DB0

0

1

0

0

X

X

PD1

PD0

DAC H to DAC B

DAC A

Command bits (C3 to C0)

Address bits (A3 to A0)—

don’t cares

Don’t cares

Power-

down mode

Power-down/power-up channel selection—

set bit to 1 to select

Table 14. 32-Bit Input Shift Register Contents for Clear Code Function

MSB

LSB

DB23

DB22

DB21

DB20

DB19

DB18

DB17

DB16

DB15 to DB2

DB1

DB0

0

1

0

1

X

X

X

X

X

CR1

CR0

Command bits (C3 to C0)

Address bits (A3 to A0)—don’t cares

Don’t cares

Clear code register

Table 15. Clear Code Register

Clear Code Register

DB1

DB0

CR1

CR0

Clears to Code

0

0

0x0000

0

1

0x8000

1

0

0xFFFF

1

1

No operation