L16B06

Preliminary

CMOS IC

UNISONIC TECHNOLOGIES CO., LTD

10 of 13

www.unisonic.com.tw

QW-R502-A45.c

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SERI AL DAT A I N T ERFACE

The serial-in data (DAI) will be clocked into 16 bit shift register synchronized on the rising edge of the clock

(DCK). The data ‘1’ represents the corresponding current output ‘ON’, while the data ‘0’ stands for ‘OFF’. The data

will be transferred into the 16 bit latch register when the strobe signal (LAT) is ‘H’ (level trigger); otherwise, the data

will be held. The trigger timing of the serial-out data (DAO) will be shifted out on synchronization to the rising edge of

the clock. All outputs are turned off while enable terminal (EN) is kept at high level. And they are active when EN

shifts to low.