SSM2529ACBZ-R7 datasheet(44/52 Pages) AD

44 / 52 page

SSM2529

Data Sheet

Rev. 0 | Page 44 of 52

DRC_CTRL3 REGISTER

Table 133. Address: 0x58, Reset: 0x00, Name: DRC_CTRL3

Bits

Bit Name

Settings

Description

Reset

Access

[7:4]

DRC_ATT

DRC attack time setting; 16 possible settings

0x0

0000

0 ms

0001

0.1 ms

0010

0.19 ms

0011

0.37 ms

0100

0.75 ms

0101

1.5 ms

0110

3 ms

0111

6 ms

1000

12 ms

1001

24 ms

1010

48 ms

1011

96 ms

1100

192 ms

1101

384 ms

1110

768 ms

1111

1.536 sec

[3:0]

DRC_DEC

DRC decay time setting; 16 possible settings

0x0

0000

0 ms

0001

1.5 ms

0010

3 ms

0011

6 ms

0100

12 ms

0101

24 ms

0110

48 ms

0111

96 ms

1000

192 ms

1001

384 ms

1010

768 ms

1011

1.536 sec

1100

3.072 sec

1101

6.144 sec

1110

12.288 sec

1111

24.576 sec

DRC_CURVE1 REGISTER

Table 134. Address: 0x59, Reset: 0x00, Name: DRC_CURVE1

Bits

Bit Name

Settings

Description

Reset

Access

Reserved

0x0

[6:0]

DRC_LT

DRC limiter threshold setting, relative to input, in 0.5 dB steps

0x00

0000000

+6 dB

0000001

+5.5 dB

xxxxxxx

−0.5 dB step

1010000

−35 dB

SSM2529ACBZ-R7 数据表(PDF) 44 Page - Analog Devices

SSM2529ACBZ-R7 数据表(HTML) 44 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

数据表下载