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SSM2529ACBZ-R7 数据表(PDF) 45 Page - Analog Devices |
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SSM2529ACBZ-R7 数据表(HTML) 45 Page - Analog Devices |
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45 / 52 page  Data Sheet SSM2529 Rev. 0 | Page 45 of 52 DRC_CURVE2 REGISTER Table 135. Address: 0x5A, Reset: 0x00, Name: DRC_CURVE2 Bits Bit Name Settings Description Reset Access 7 Reserved 0x0 RW [6:0] DRC_CT DRC compressor threshold setting, relative to input in 0.5 dB steps 0x00 RW 0000000 +6 dB 0000001 +5.5 dB xxxxxxx −0.5 dB step 1010000 −35 dB DRC_CURVE3 REGISTER Table 136. Address: 0x5B, Reset: 0x00, Name: DRC_CURVE3 Bits Bit Name Settings Description Reset Access 7 Reserved 0x0 RW [6:0] DRC_SMAX This is the DRC maximum output signal amplitude setting. This is the maximum output level produced by the DRC and is used to indicate the upper compressor threshold. The possible settings are in 0.5 dB steps. 0x00 RW 0000000 +6 dB 0000001 +5.5 dB xxxxxxx −0.5 dB step 1010000 −35 dB DRC_CURVE4 REGISTER Table 137. Address: 0x5C, Reset: 0x88, Name: DRC_CURVE4 Bits Bit Name Settings Description Reset Access [7:4] DRC_NT DRC noise gating threshold setting, relative to input; 16 possible values in 3 dB steps 0x8 RW 0000 −51 dB 0001 −54 dB xxxx −3 dB step 1111 −96 dB [3:0] DRC_ET DRC expander threshold setting, relative to input; 16 possible values in 3 dB steps 0x8 RW 0000 −36 dB 0001 −39 dB xxxx −3 dB step 1111 −81 dB DRC_CURVE5 REGISTER Table 138. Address: 0x5D, Reset: 0x00, Name: DRC_CURVE5 Bits Bit Name Settings Description Reset Access [7:4] Reserved 0x0 RW [3:0] DRC_SMIN DRC minimum output signal level 0x0 RW 0000 −51 dB(default) 0001 −54 dB xxxx −3 dB step 1011 −84 dB 1111 −96 dB |
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