3 / 10 page  W255 Document #: 38-07255 Rev. *C Page 3 of 10 Serial Configuration Map • The serial bits will be read by the clock driver in the following order: Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0 Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0 . . Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0 • Reserved and unused bits should be programmed to “0.” • SMBus Address for the W255 is: A6 A5 A4 A3 A2 A1 A0 R/W 1101001 ---- Byte 6: Outputs Active/Inactive Register (1 = Active, 0 = Inactive), Default = Active Bit Pin # Description Default Bit 7 – Reserved, drive to 0 0 Bit 6 – Reserved, drive to 0 0 Bit 5 – Reserved, drive to 0 0 Bit 4 1 FBOUT 1 Bit 3 45,44 DDR11T, DDR11C 1 Bit 2 43, 42 DDR10T, DDR10C 1 Bit 1 39, 38 DDR9T, DDR9C 1 Bit 0 34, 33 DDR8T, DDR8C 1 Byte 7: Outputs Active/Inactive Register (1 = Active, 0 = Inactive), Default = Active Bit Pin # Description Default Bit 7 30, 29 DDR7T, DDR7C 1 Bit 6 28, 27 DDR6T, DDR6C 1 Bit 5 21, 22 DDR5T_SDRAM8, DDR5C_SDRAM9 1 Bit 4 19, 20 DDR4T_SDRAM6, DDR4C_SDRAM7 1 Bit 3 15,16 DDR3T_SDRAM4, DDR3C_SDRAM5 1 Bit 2 10, 11 DDR2T_SDRAM2, DDR2C_SDRAM3 1 Bit 1 6, 7 DDR1T_SDRAM0, DDR1C_SDRAM1 1 Bit 0 4, 5 DDR0T_SDRAM10, DDR0C_SDRAM11 1 |
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