PIC18LF4520ESLASHSP datasheet(14/390 Pages) MICROCHIP

14 / 390 page

PIC18F2420/2520/4420/4520

DS39631A-page 12

Preliminary

 2004 Microchip Technology Inc.

TABLE 1-2:

PIC18F2420/2520 PINOUT I/O DESCRIPTIONS

Pin Name

Pin Number

Type

Buffer

Type

Description

PDIP,

SOIC

QFN

MCLR/VPP/RE3

MCLR

VPP

RE3

126

Master Clear (input) or programming voltage (input).

Master Clear (Reset) input. This pin is an active-low

Reset to the device.

Programming voltage input.

Digital input.

OSC1/CLKI/RA7

OSC1

CLKI

RA7

I/O

CMOS

TTL

Oscillator crystal or external clock input.

Oscillator crystal input or external clock source input.

ST buffer when configured in RC mode; CMOS otherwise.

External clock source input. Always associated with pin

function OSC1. (See related OSC1/CLKI, OSC2/CLKO

pins.)

General purpose I/O pin.

OSC2/CLKO/RA6

OSC2

CLKO

RA6

I/O

—

TTL

Oscillator crystal or clock output.

Oscillator crystal output. Connects to crystal or

resonator in Crystal Oscillator mode.

In RC mode, OSC2 pin outputs CLKO which has 1/4 the

frequency of OSC1 and denotes the instruction cycle rate.

General purpose I/O pin.

Legend: TTL = TTL compatible input

CMOS = CMOS compatible input or output

ST = Schmitt Trigger input with CMOS levels

= Input

= Output

= Power

Note 1: Default assignment for CCP2 when configuration bit CCP2MX is set.

2: Alternate assignment for CCP2 when configuration bit CCP2MX is cleared.

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