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STC89LE52RC 数据表(PDF) 118 Page - STCmicro Technology Co,.Ltd |
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STC89LE52RC 数据表(HTML) 118 Page - STCmicro Technology Co,.Ltd |
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118 / 165 page ![]() 9-Bit UART with Variable Baud Rate (Mode 3) Mode 3, 9-bit UART with variable baud rate, is the same as mode 2 except the baud rate is variable. Baud rate in mode 3 = (2 SMOD /32 ) x Timer 1overflow rate or = (2 SMOD /16 ) x Timer 2 overflow rate In all four modes, transmission is initiated by any instruction that use SBUF as a destination register. Reception is initiated in mode 0 by the condition RI = 0 and REN = 1. Reception is initiated in the other modes by the incoming start bit with 1-to-0 transition if REN=1. 8.2 Frame Error Detection When used for frame error detect, the UART looks for missing stop bits in the communication. A missing bit in stop bit will set the FE bit in the SCON register. The FE bit shares the SCON.7 bit with SM0 and the function of SCON.7 is determined by PCON.6(SMOD0). If SMOD0 is set then SCON.7 functions as FE. SCON.7 functions as SM0 when SMOD0 is cleared. When used as FE, SCON.7 can only be cleared by software.Refer to the following figure. 8.3 Multiprocessor Communications Modes 2 and 3 have a special provision for multiproceasor communications. In these modes 9 data bits are re- ceived.The 9th one goes into RB8. Then comes a stop bit. The port can be programmed such that when the stop bit is received,the serial port interrupt will be activated only if RB8 = 1. This feature is enabled by setting bit SM2 in SCON. A way to use this feature in multiprocessor systems is as follows. When the master processor wants to transmit a block of data to one of several slaves, it first sends out an address byte which identifies the target slave.An address byte differs from a data byte in that the 9th bit is 1 in an address byte and 0 in a data byte.With SM2 = 1, no slave will be interrupted by a data byte. An address byte, however,will interrupt all slaves, so that each slave can examine the received byte and see if it is being addressed.The addressed slave will clear its SM2 bit and prepare to receive the data bytes that will be coming. The slaves that weren’t be- ing addressed leave their SM2s set and go on about their business, ignoring the coming data bytes. SM2 has no effect in Mode 0,and in Mode 1 can be used to check the validity of the stop bit. In a Mode 1 recep- tion, if SM2 = 1, the receive interrupt will not be activated unless a vatid stop bit is received. D1 D0 D2 D3 D4 D5 D6 D7 START BIT STOP BIT D8 SM0/FE SM1 SM2 REN TB8 RB8 TI RI 9-bit data SET FE bit if STOP=0 SM0 to UART mode control PCON.6/SMOD0 SCON UART Frame Error Detection 1 0 118 |
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