Power Saving Mode

In FS501 except VCCR generator, the user can use the control registers to turn off part of the circuits to reduce

power consumption. The control signals related to power saving are shown in Table 6. If we turn off all the

devices (circuits) but keep VCCR active, shown in Table 6, the total current of FS501 chip will be less than

10uA

Table 6. Setting of the Power Saving Mode

Register

Control Name

Power-Saving Setting Power Consumption Circuit

AFT<6>

RCTEN

0

Op Amp

AFT<4>

ACEN

0

Op Amp

ADG<7>

ENAD

0

ADC

SETADC<7:6>

ENVDS, ENVCS

00

Switching Power Output

MISC1<4>

ENOSCO_

1

OSCO Output

MISC1<3>

ENXTL_

1

Crystal Oscillator

MISC2<1>

ENGNDR_

1

GNDR Voltage Regulator

Switchable Power Output

VDD/VCC

ENVDS/

ENVCS

VDDS/

VCCS

Terminals of VDDS and VCCS are the switchable power outputs of VDD and VCC respectively, and the circuit

diagram is shown in Fig. 5. VDD/VCC is fed in the PMOS switch, and VDDS/VCCS is the output. The PMOS

switch is controlled by ENVDS/ENVCS control signal. Signals 0 and 1 will turn on and turn off the PMOS switch

respectively.