MSM6896 datasheet(12/43 Pages) OKI

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¡ Semiconductor

MSM6895/6896

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AD0, AD1

Address data inputs for the internal control registers.

Addressing of the internal control registers is executed by AD0 and AD1 and sub address data,

DB7 and DB6.

Write signal for internal control registers.

Data on the data bus is written into the registers at the rising edge of WR under the condition of

digital "0" of CE (Chip Enable). While CE is in digital "1" state, WR becomes invalid. The Write

cycle is a minimum of 2 ms, but if the CK64 and CK8 signals are silent, the write cycle requires

a minimum of 50 ms.

A minimum of 2 ms specified as the write cycle is valid 10 ms after CK64 and CK8 signals are input.

Read signal input to read PI0 to PI7 out of the processor.

When CE and RD are in digital "0" state, the digital values on PI0 to PI7 are output onto the data

buses DB0 to DB7. While CE is in digital "1" state, the RD signal becomes invalid.

Write

Read

AD1

AD0

DB7

DB6

—

Function

Sounder Control

Control of function key acknowledge tone

PB tone control

Control of the internal control latch and the general-purpose latch,

Reset control of the watch dog timer.

Control of channel selector

Key scanning output control, interrupt release control

Volume control and tone combination control of sounder

CODEC power down control

Level control of transmit path, PB tone, and Hold tone, Gain control of

receive path

Frequency control of howler tone

Read of the key scanning data

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