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TPS1663 数据表(PDF) 8 Page - Texas Instruments

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部件名 TPS1663
功能描述  60-V, 6-A eFuse with adjustable output power limiting
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TPS1663 数据表(HTML) 8 Page - Texas Instruments

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Temperature (qC)
-60
-30
0
30
60
90
120
150
0
15
30
45
60
75
D002
ILOAD = 0.6 A
ILOAD = 6 A
Temperature (qC)
-50
0
50
100
150
30
32
34
36
38
40
D006
8
TPS1663
SLVSET9C – SEPTEMBER 2018 – REVISED MARCH 2019
www.ti.com
Product Folder Links: TPS1663
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Timing Requirements (continued)
–40°C
≤ TA = TJ ≤ +125°C, 4.5 V < V(IN) = V(P_IN) < 60 V, V(SHDN) = 2 V, R(ILIM) = 30 kΩ, IMON = PGOOD = FLT = OPEN, C(OUT)
= 1 μF, C(dVdT) = OPEN. (All voltages referenced to GND, (unless otherwise noted))
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
tCL_PLIM_FLT(dly)
FLT delay in current & (power limiting:
TPS16632 Only)
1.09
1.3
1.6
ms
OUTPUT RAMP CONTROL (dVdT)
t(FASTCHARGE)
Output ramp time in fast charging
C(dVdT) = Open, 10% to 90%
V(OUT), C(OUT) = 1 µF; V(IN) = 24V
350
495
700
µs
t(dVdT)
Output ramp time
C(dVdT) = 22 nF, 10% to 90%
V(OUT), V(IN) = 24V
8.35
ms
POWER GOOD (PGOOD)
tPGOODR
PGOOD delay (deglitch) time
Rising edge
8
11.5
13
ms
tPGOODF
PGOOD delay (deglitch) time
Falling edge
8
10
13
ms
THERMAL PROTECTION
t(TSD_retry)
Retry delay in TSD
MODE = GND
500
648
800
ms
t(Treg_timeout)
Thermal Regulation Timeout
1.1
1.25
1.5
s
7.7 Typical Characteristics
–40°C
≤ TA = TJ ≤ +125°C, V(IN) = V(P_IN) = 24 V, V(SHDN) = 2 V, R(ILIM) = 30 kΩ, IMON = PGOOD = FLT = OPEN, C(OUT) = 1 μF,
C(dVdT) = OPEN. (Unless stated otherwise)
Figure 1. On-Resistance vs Temperature Across Load
Current
TPS16632
Figure 2. Overvoltage Clamp Threshold vs Temperature



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