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ADE7756ARSRL 数据表(PDF) 19 Page - Analog Devices |
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ADE7756ARSRL 数据表(HTML) 19 Page - Analog Devices |
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19 / 32 page ![]() REV. 0 ADE7756 –19– 0 0 0 01 HEX IRQ DIN DOUT SCLK SAMPLING RATE (27.9kSPS, 14kSPS, 7kSPS OR 3.5kSPS) READ FROM WAVEFORM CHANNEL 1 DATA – 20 BITS 16 s SIGN Figure 19. Waveform Sampling Channel 1 CHANNEL 2 ADC Channel 2 Sampling In Channel 2 waveform sampling mode (MODE[14:13] = 1,1 and WSMP = 1) the ADC output code scaling for Channel 2 is the same as Channel 1, i.e., the output swings between D7AE1h (–165,151) and 2851Fh (+165,151)—see ADC Channel 1 sec- tion. However, before being passed to the Waveform register, the ADC output is passed through a single-pole, low-pass filter with a cutoff frequency of 156 Hz. The plots in Figure 20 shows the magnitude and phase response of this filter. FREQUENCY – Hz 0 –40 101 103 102 –60 –40 –20 –20 0 (60Hz, –21.04 ) (60Hz, –0.6dB) –80 Figure 20. Magnitude and Phase Response of LPF1 This has the effect of attenuating the signal. For example, if the line frequency is 60 Hz, the signal at the output of LPF1 will be attenuated by 30%. |( )| . – . Hf Hz Hz dB = + == 1 1 60 156 093 0 6 2 Note that LPF1 does not affect the power calculation. The signal processing chain in Channel 2 is illustrated in Figure 21. Unlike Channel 1, Channel 2 has only one analog input range (1 V differential). However, like Channel 1, Channel 2 does have a PGA with gain selections of 1, 2, 4, 8, and 16. For energy measure- ment, the output of the ADC is passed directly to the multiplier and is not filtered. An HPF is not required to remove any dc offset since it is only required to remove the offset from one chan- nel to eliminate errors due to offsets in the power calculation. When in waveform sample mode, one of four output sample rates can be chosen by using Bits 11 and 12 of the Mode regis- ter. The available output sample rates are 27.9 kSPS, 14 kSPS, 7 kSPS or 3.5 kSPS—see Mode Register section. The interrupt request output IRQ signals a new sample availability by going active low. The timing is the same as that for Channel 1 and is shown in Figure 19. 1 –63% TO + 63% FS 60Hz 1V, 0.5V, 0.25V, 0.125V, 0.0625V x1, x2, x4, x8, x16 GAIN[7:5] REFERENCE 2.42V V2 0V 2851Fh D7AE1h +63% FS –63% FS +44% FS –44% FS 00000h 1C396h E3C6Ah ANALOG INPUT RANGE LPF OUTPUT WORD RANGE TO MULTIPLIER TO WAVEFORM REGISTER LPF1 V2P V2N ADC2 PGA2 V1 20 40000h +FS C0000h –FS 60Hz Figure 21. ADC and Signal Processing in Channel 2 |
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