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EM5301F 数据表(PDF) 5 Page - Excelliance MOS Corp. |
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EM5301F 数据表(HTML) 5 Page - Excelliance MOS Corp. |
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5 / 12 page ![]() 2013/5/2 Rev.A.1 5 EM5301F/G Open Loop DC Gain AO 88 dB Gain-Bandwidth Product GBW 15 MHz Maximum Duty DMAX 80 % PWM Controller Gate Drivers Upper Gate Sourcing Current IUG_SRC VBOOT - VPHASE = 12V, VBOOT - VUGATE = 6V -1.2 A Upper Gate Sinking Current IUG_SNK VBOOT - VPHASE = 12V, VUGATE – VPHASE = 6V 1.5 A Upper Gate RDS(ON) Sinking RUG_SNK VBOOT - VPHASE = 12V, VUGATE – VPHASE = 0.1V 2 4 Ω Lower Gate Sourcing Current ILG_SRC VCC – VLGATE = 6V -1.2 A Lower Gate Sinking Current ILG_SNK VLGATE = 6V 1.5 A Lower Gate RDS(ON) Sinking RLG_SNK VLGATE = 0.1V 1 2 Ω PHASE Falling to LGATE Rising Delay VCC = 12V; (VUGATE - VPHASE)< 1.2V to VLGATE > 1.2V 30 90 ns LGATE Falling to UGATE Rising Delay VCC = 12V; VLGATE < 1.2V to (VUGATE - VPHASE) > 1.2V 30 90 ns Reference Voltage Nominal Feedback Voltage VFB 0.792 0.8 0.808 V Protection section FB Under Voltage Protection VFB_UVP FB falling 68 75 82 % FB Over Voltage Protection VFB_OVP FB rising 115 130 145 % LGATE OC Setting Current IOCSET 22 25 28 uA Over Current Threshold1 VPHA_OC1 RLGATE=8Kohm -400 mV Soft-Start Interval TSS 3.6 ms COMP Enable Threshold VCOMP/EN 0.2 V Temperature Shutdown TSD 165 ℃ Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θ JA PSOP-8 packages is 52°C /W on JEDEC 51-7 (4 layers,2S2P) thermal test board with 50mm 2 copper area. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. |
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