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¡ Semiconductor

MSM80C85AHRS/GS/JS

LOGICAL

ANA r

XRA r

ORA r

CMP r

ANA M

XRA M

ORA M

CMP M

ANI

XRI

ORI

CPI

Mnemonic

Description

Instruction Code (1)

Clock (2)

Cycles

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

1

1

0

0

1

1

0

0

1

1

0

1

0

1

0

1

0

1

0

1

0

1

S

S

S

S

1

1

1

1

1

1

1

1

S

S

S

S

1

1

1

1

1

1

1

1

S

S

S

S

0

0

0

0

0

0

0

0

4

4

4

4

7

7

7

7

7

7

7

7

Add register with A

Exclusive Or register with A

Or register with A

Compare register with A

And memory with A

Exclusive Or Memory with A

Or memory with A

Compare memory with A

And immediate with A

Exclusive Or immediate with A

Or immediate with A

Compare immediate with A

ROTATE

RLC

RRC

RAL

RAR

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

1

0

1

1

1

1

1

1

1

1

1

1

1

1

1

4

4

4

4

Rotate A left

Rotate A right

Rotate A left through carry

Rotate A right through carry

SPECIALS

CMA

STC

CMC

DAA

0

0

0

0

0

0

0

0

1

1

1

1

0

1

1

0

1

0

1

0

1

1

1

1

1

1

1

1

1

1

1

1

4

4

4

4

Complement A

Set carry

Complement carry

Decimal adjust A

CONTROL

EI

DI

NOP

HLT

RIM

SIM

1

1

0

0

0

0

1

1

0

1

0

0

1

1

0

1

1

1

1

1

0

1

0

1

1

0

0

0

0

0

0

0

0

1

0

0

1

1

0

1

0

0

1

1

0

0

0

0

4

4

4

5

4

4

Enable Interrupts

Disable Interrupts

No-operation

Halt (Power down)

Read Interrupt Mask

Set Interrupt Mask

Table 8 Instruction Set Summary cont'd

Notes: (1) DDD or SSS. B 000. C 001. D 010. E 011. H 100. L 101. Memory 110. A 111.

(2) Two possible cycle times, (6/12) indicate instruction cycles dependent on

condition flags.

Precautions for operation

(1) When the oscillation circuit is to be used, keep the RES input low until the oscillation is

sufficiently stabilized after power is turned on.

(2) When power is turned on, the output level (SOD etc.) is unknown before the equipment

is reset.

(3) Bug of MSM80C85A–2 at power down has fixed.

(4) Because Spike Noise would be output on HLDA, RESET OUT and CLK pins, depending

on the customers condition of usage; please take into account this issue at System Board

design.