MPC885CZP133 datasheet(4/92 Pages) FREESCALE

4 / 92 page

MPC885/MPC880 Hardware Specifications, Rev. 3

Freescale Semiconductor

Features

— Advanced encryption standard unit (AESU)

– Implements the Rinjdael symmetric key cipher

– ECB, CBC, and counter modes

– 128-, 192-, and 256- bit key lengths

— Message digest execution unit (MDEU)

– SHA with 160- or 256-bit message digest

– MD5 with 128-bit message digest

– HMAC with either algorithm

— Crypto-channel supporting multi-command descriptor chains

— Integrated controller managing internal resources and bus mastering

—

Buffer size of 256 bytes for the DEU, AESU, and MDEU, with flow control for large data sizes

•

Interrupts

— Six external interrupt request (IRQ) lines

— 12 port pins with interrupt capability

— 23 internal interrupt sources

— Programmable priority between SCCs

— Programmable highest priority request

•

Communications processor module (CPM)

— RISC controller

— Communication-specific commands (for example, GRACEFUL STOP TRANSMIT, ENTER HUNT MODE, and

RESTART TRANSMIT

)

— Supports continuous mode transmission and reception on all serial channels

— 8-Kbytes of dual-port RAM

— Several serial DMA (SDMA) channels to support the CPM

— Three parallel I/O registers with open-drain capability

•On-chip 16

× 16 multiply accumulate controller (MAC)

— One operation per clock (two-clock latency, one-clock blockage)

— MAC operates concurrently with other instructions

— FIR loop—Four clocks per four multiplies

•

Four baud rate generators

— Independent (can be connected to any SCC or SMC)

— Allow changes during operation

— Autobaud support option

•

Up to three serial communication controllers (SCCs) supporting the following protocols:

— Serial ATM capability on SCCs

— Optional UTOPIA port on SCC4

— Ethernet/IEEE 802.3 optional on the SCC(s) supporting full 10-Mbps operation

— HDLC/SDLC

— HDLC bus (implements an HDLC-based local area network (LAN))

— Asynchronous HDLC to support point-to-point protocol (PPP)

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