RF63W datasheet(33/91 Pages) HOPE

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ADVANCED COMMUNICATIONS & SENSING

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RF63

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4. Operating Modes

This section summarizes the settings for each operating mode of the RF63, and explains the functionality

available and the timing requirements for switching between modes.

4.1. Modes of Operation

Table 12: Operating Modes

Mode

MCParam_Chip_mode

Active blocks

Sleep

000

SPI, POR

Standby

001

SPI, POR, Top regulator, digital regulator, XO, CLKOUT (if activated through

OSCParam_Clkout)

010

Same + VCO regulator, all PLL and LO generation blocks

Receive

011

Same as FS mode + LNA, first mixer, IF amplifier, second mixer set, channel

filters, baseband amplifiers and limiters, RSSI, OOK or FSK demodulator,

BitSync and all digital features if enabled

Transmit

100

Same as FS mode + DDS, Interpolation filters, all up-conversion mixers, PA

driver, PA and external VR_PA pin output for PA choke.

4.2. Digital Pin Configuration vs. Chip Mode

Table 13 describes the state of the digital IOs in each of the above described modes of operation, regardless of the

data operating mode (Continuous, Buffered, or Packet).

Table 13: Pin Configuration vs. Chip Mode

Chip

……….Mode

Sleep

mode

Standby

mode

FS mode

Receive

mode

Transmit

mode

Comment

NSS_CONFIG

Input

NSS_CONFIG has the priority over

NSS_DATA

Input

MISO

Input

Output only if NSS_CONFIG or

NSSDATA=

‟0‟

MOSI

Input

SCK

Input

IRQ_0

High-Z

Output (1)

Output

IRQ_1

High-Z

Output (1)

Output

DATA

Input

Output

Input

CLKOUT

High-Z

Output

PLL_LOCK

High-Z

Output (2)

Notes:

(1): High-Z if Continuous mode is activated, else Output

(2): Output if PLL_lock_en = 1, else High-Z

(3): Valid logic states must be applied to inputs at all times to avoid unwanted leakage currents

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