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HN58V65API-10 数据表(PDF) 4 Page - Renesas Technology Corp |
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HN58V65API-10 数据表(HTML) 4 Page - Renesas Technology Corp |
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4 / 28 page ![]() HN58V65AI/HN58V66AI/HN58V65A-SR/HN58V66A-SR Series Rev.3.00, Feb.02.2004, page 4 of 26 Pin Description Pin name Function A0 to A12 Address input I/O0 to I/O7 Data input/output OE Output enable CE Chip enable WE Write enable VCC Power supply VSS Ground RDY/ Busy Ready busy RES*1 Reset NC No connection Note: 1. This function is supported by only the HN58V66A series. Block Diagram Note: 1. This function is supported by only the HN58V66A series. V V OE CE A5 A0 A6 A12 WE CC SS I/O0 I/O7 High voltage generator Control logic and timing Y decoder X decoder Address buffer and latch I/O buffer and input latch Y gating Memory array Data latch RES RDY/ Busy RES *1 *1 to to to |
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