PSD813F1 datasheet(39/110 Pages) STMICROELECTRONICS

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PSD813F1

Product Term Allocator

The CPLD has a Product Term Allocator. The PS-

Dabel compiler uses the Product Term Allocator to

borrow and place product terms from one macro-

cell to another. The following list summarizes how

product terms are allocated:

McellAB0-McellAB7 all have three native

product terms and may borrow up to six more

McellBC0-McellBC3 all have four native

product terms and may borrow up to five more

McellBC4-McellBC7 all have four native

product terms and may borrow up to six more.

Each macrocell may only borrow product terms

from certain other macrocells. Product terms al-

ready in use by one macrocell are not available for

another macrocell.

If an equation requires more product terms than

are available to it, then “external” product terms

are required, which will consume other Output

Macrocells (OMC). If external product terms are

used, extra delay will be added for the equation

that required the extra product terms.

This is called product term expansion. PSDsoft

Express will perform this expansion as needed.

Loading and Reading the Output Macrocells

(OMC). The OMCs occupy a memory location in

the MCU address space, as defined by the CSIOP

(refer to the I/O section). The flip-flops in each of

the 16 OMCs can be loaded from the data bus by

a microcontroller. Loading the OMCs with data

from the MCU takes priority over internal func-

tions. As such, the preset, clear, and clock inputs

to the flip-flop can be overridden by the MCU. The

ability to load the flip-flops and read them back is

useful in such applications as loadable counters

and shift registers, mailboxes, and handshaking

protocols.

Data can be loaded to the OMCs on the trailing

edge of the WR signal (edge loading) or during the

time that the WR signal is active (level loading).

The method of loading is specified in PSDsoft Ex-

press Configuration.

The OMC Mask Register

There is one Mask Register for each of the two

groups of eight OMCs. The Mask Registers can be

used to block the loading of data to individual

OMCs. The default value for the Mask Registers is

00h, which allows loading of the OMCs. When a

given bit in a Mask Register is set to a ‘1’, the MCU

will be blocked from writing to the associated

OMC. For example, suppose McellAB0-3 are be-

ing used for a state machine. You would not want

a MCU write to McellAB to overwrite the state ma-

chine registers. Therefore, you would want to load

the Mask Register for McellAB (Mask Macrocell

AB) with the value 0Fh.

The Output Enable of the OMC

The OMC can be connected to an I/O port pin as

a PLD output. The output enable of each Port pin

driver is controlled by a single product term from

the AND array, ORed with the Direction Register

output. The pin is enabled upon power up if no out-

put enable equation is defined and if the pin is de-

clared as a PLD output in PSDsoft Express.

If the OMC output is declared as an internal node

and not as a Port pin output in the PSDabel file,

then the Port pin can be used for other I/O func-

tions. The internal node feedback can be routed as

an input to the AND array.

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