M28W320FSB datasheet(20/55 Pages) STMICROELECTRONICS

20 / 55 page

M28W320FST, M28W320FSB, M28W640FST, M28W640FSB

20/55

gram/Erase Controller Status bit is High (Program/

Erase Controller inactive). Bit 2 is set within 5µs of

the Program/Erase Suspend command being is-

sued therefore the memory may still complete the

operation rather than entering the Suspend mode.

When a Program/Erase Resume command is is-

sued the Program Suspend Status bit returns Low.

Block Protection Status (Bit 1). The Block Pro-

tection Status bit can be used to identify if a Pro-

gram or Erase operation has tried to modify the

contents of a locked block.

When the Block Protection Status bit is High (set

to ‘1’), a Program or Erase operation has been at-

tempted on a locked block.

Once set High, the Block Protection Status bit can

only be reset Low by a Clear Status Register com-

mand or a hardware reset. If set High it should be

reset before a new command is issued, otherwise

the

new

command

will

appear

fail.

Reserved (Bit 0). Bit 0 of the Status Register is

reserved. Its value must be masked.

Note: Refer to APPENDIX C., FLOWCHARTS

AND PSEUDO CODES, for using the Status

Table 9. Status Register Bits

Note: Logic level '1' is High, '0' is Low.

Bit

Name

Logic Level

Definition

P/E.C. Status

'1'

Ready

'0'

Busy

Erase Suspend Status

'1'

Suspended

'0'

In progress or Completed

Erase Status

'1'

Erase Error

'0'

Erase Success

Program Status

'1'

Program Error

'0'

Program Success

VPP Status

'1'

VPP Invalid, Abort

'0'

VPP OK

Program Suspend Status

'1'

Suspended

'0'

In Progress or Completed

Block Protection Status

'1'

Program/Erase on protected Block, Abort

'0'

No operation to protected blocks

0Reserved

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