GPBA02A

© Generalplus Technology Inc.

Proprietary & Confidential

7

JAN. 06, 2011

Version: 1.6

5. FUNCTIONAL DESCRIPTIONS

The I/O extender provides 24 I/O ports. Which are divided into

three groups: Port A, Port B and Port C. These I/O ports can be

configured as normal I/O ports.

Also, each port has

programmable pull high/low input and open drain output function.

The device is optimal for various fields such industrial and

commercial applications.

5.1. SPI

The SPI supports full-duplex synchronous transfer between a

Master device and a Slave device.

GPBA02A only supports

Slave Modes for SPI transfer (MODE 0).

5.1.1. SPI Serial Interface

Micro-Controller

HOST:

IO_Extender

SLAVE:

DATA IN(MISO)

DATA OUT(MOSI)

Serial clock(SCK)

Chip select(CSB)

MOSI

MISO

SCK

CSB

MOSI

MISO

SCK

CSB

(Device=0)

(Device=1)

As shown in the above diagram, the host can connect to two I/O

extenders.

The device selecting bit is controlled by software

command from the host. If the corresponding bit (B6) of the

command is set as 0, the apparatus signed with Device=0 will

selected. And else, if the corresponding bit (B6) of the command

is set as 1, the apparatus signed with Device=1 will selected.

The I/O extender has separated pins designated for data

transmission (MISO) and reception (MOSI). When the device is

selected and the CSB pin is low, data and command are able to

be transmitted via MOSI and MISO pins. And when the device is

not selected or the CSB pin is not low, data will not be accepted

via MOSI pin, and the serial output pin (MISO) will remain in high

impedance state. The serial clock pin (SCK) of I/O extender is

always set as an input; the I/O extender always operates as a

slave.

5.1.2. Data Frame Description

When the host writes data into I/O extender registers, one writing

data frame will form 16 bits data. The first 8 bits are command

data, and the following 8 bits data will be written into register.

The host sends command and value from MSB to LSB via MOSI

pin. During write operation cycles, the MISO pin keeps in high

impedance status.

When the host reads data from I/O extender registers or I/O ports,

the read command byte will first be sent to I/O extender from MSB

to LSB via MOSI pin during the first 8 SCK clock cycles. And the

value byte read from corresponding register will be sent to host via

MISO pin during the following 8 SCK clock cycles from MSB to

LSB.

HOST writes data to register:

MOSI

COMMAND

DATAIN

MISO

Z

Z

HOST reads data from register:

MOSI

COMMAND

X

MISO

Z

DATAOUT

5.1.3. Command List

Command

B7(MSB)

B6

B5

B4

B3

B2

B1 B0

Write register

1

1*

Register address

Read register

0

1*

Register address

Reset

FFH

No response

others

Note:

1* is optional and user can choice device 1 or 0 (two device) in one

SPI interface with bonding option PAD (DEVICE).

As shown in the command list, the read or write command

consists of 8 bits data. The highest bit B7 represents reading or

writing.

When this bit is low, the command executes a read

instruction. On the contrary, when this bit is high, the command

executes a write instruction.

The bit B6 is used for device

selecting and the value depends on the bonding option bit. This

option bit should be configured as low or high by users in advance.

When DEVICE pin is floating, the value of B0 will be defaulted as

0. If the value of B6 is the same as the option bit, this I/O

extender is selected, and this command will be executed.

Otherwise, this I/O extender will not respond. The content of

B5-0 is used for register address.

The reading or writing

command is executed for the register with this address.

In

addition, if the B7-0 of the command is equal to FFH, all those

built-in registers will be reset to the initial values. This software

command and power-on reset can make all the registers to reset.