GPBA02A

© Generalplus Technology Inc.

Proprietary & Confidential

11

JAN. 06, 2011

Version: 1.6

5.3. Timing Diagram for SPI Control

5.3.1. I/O Operation Function Timing

Write register timing:

The command byte: C7=1; C6=device option value; C5-4=00;

C3-0=register address. The write data byte: D7-0 is the value

that will be written to the corresponding register. In write register

cycles, the output pin (MISO) remains in high impedance state.

Speed up AND register timing:

The command byte: C7=1; C6=device option value, C5-4=01,

C3-0=register address. The speed up AND data byte: D7-0 is the

value that will be AND with the corresponding 0xH register’s value

and then be written to the corresponding 0xH register. In speed

up AND register cycles, the output pin (MISO) remains in high

impedance state.

Speed up OR register timing:

The command byte: C7=1; C6=device option value; C5-4=10;

C3-0=register address. The speed up OR data byte: D7-0 is the

value that will be OR with the corresponding 0xH register’s value

and then be written to the corresponding 0xH register. In speed

up OR register cycles, the output pin (MISO) remains in high

impedance state.