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MP7652AS 数据表(PDF) 4 Page - Exar Corporation |
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MP7652AS 数据表(HTML) 4 Page - Exar Corporation |
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4 / 16 page  MP7652 4 Rev. 1.00 ELECTRICAL CHARACTERISTICS TABLE FOR DUAL SUPPLIES Unless Otherwise Noted: VDD = 5 V, VCC = +5 V, VEE = –5 V, VREFP = 3 V and –3 V, T = 25°C, Output Load = Open, DGND=VREFN = 0 V 25 °C Parameter Symbol Min Typ Max Units Test Conditions/Comments DC CHARACTERISTICS Resolution (All Grades) N 8 Bits Differential Non-Linearity DNL +0.8 LSB Integral Non-Linearity INL +1 LSB Monotonicity Guaranteed Gain Error GE +1.5 % FSR FSR = Full Scale Range1 Zero Scale Offset ZOFS +50 mV Output Drive Capability IO +1mA REFERENCE/INV INPUTS Impedance of VREF REF 6 18 k Ω Voltage Range VR VEE +1.5 VCC –1.8 V VREFP Max Swing is VREFN +3 V VREFN DC Voltage Range INV Pos. VO V INV Neg. VEE + 1V DYNAMIC CHARACTERISTICS2 RL = 5 kΩ, CL = 20 pF Input to Output Bandwidth 15 MHz VREFP=1.6 Vp–p, RL =5kΩ, to VEE Input to Output Settling Time6 150 ns VREFP=1.6Vp–p, RL =5kΩ, to VEE Small Signal Voltage Reference ƒtr 15 MHz VOUT=50mV p-p above code 16 Input to Output Bandwidth Small Signal Voltage Reference ƒtr 15 MHz VOUT=50mV p-p for all codes Input to Output Bandwidth Voltage Settling from VREF to tsr 275 ns VREFP=0 to VREFP = 3V Step6 VDAC Out to 1 LSB Voltage Settling from Digital tsd 275 ns ZS to FS to 1 LSB Code to VDAC Out VREF Feedthrough FDT TBD dB Codes=0 @ 1 MHz Group Delay GD TBD ns Harmonic Distortion THD TBD % VREFP=1MHz Sine 3V p-p Channel-to-Channel Crosstalk CT TBD dB @ 1 MHz, single channel Digital Feedthrough Q TBD nVs CLK to VOUT Power Supply PSRR +0.5 %/% ∆V=+5% Rejection Ratio POWER CONSUMPTION Positive Supply Current ICC 12 mA VREFP = 0 V Negative Supply Current IEE 12 mA VREFP = 0 V Power Dissipation PDISS 80 mW VREFP = 0 V, Codes = all 1 DIGITAL INPUT CHACTERISTICS Logic High3 VIH 2.4 V Logic Low3 VIL 0.8 V Input Current IL +10 µA Input Capacitance2 CL 8pF |
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