TC9208M
Preliminary Data Sheet
Table Of Contents
Features ..............................................................................................................................................................1
General Description............................................................................................................................................1
Block Diagram.....................................................................................................................................................2
Table Of Contents ...............................................................................................................................................3
Revision History ..................................................................................................................................................4
Pins Placement...................................................................................................................................................5
1
Pin Listing (PBGA 292) ...............................................................................................................................6
2
Ethernet Media Access Controller ............................................................................................................17
2.1
Receive MAC .....................................................................................................................17
2.2
Transmit MAC ....................................................................................................................18
3
MAC Address Handling.............................................................................................................................19
4
Queue Management.................................................................................................................................19
5
Classes of Service ....................................................................................................................................20
6
Trunk Configuration...................................................................................................................................22
7
Flow Control ..............................................................................................................................................22
8
Broadcast Throttling..................................................................................................................................24
9
Port Mirroring.............................................................................................................................................24
10 Physical Layer Configuration / Polling......................................................................................................25
11 EEPROM Interface ...................................................................................................................................26
11.1
Reprogramming the EEPROM for reconfiguration ............................................................ 26
11.2
EEPROM Address Map ..................................................................................................... 27
11.3
Register Description........................................................................................................... 29
11.3.1
Validation Register ................................................................................................ 29
11.3.2
Port [X] Configuration Register ............................................................................. 31
11.3.3
Port [X] IFG Configuration Register ...................................................................... 33
11.3.4
Flow Control Register ........................................................................................... 34
11.3.5
Backpressure Time Value Register....................................................................... 35
11.3.6
Flow Control Port Base Address Register ............................................................ 36
11.3.7
Trunk Configuration Register ................................................................................ 36
11.3.8
Broadcast Configuration Register......................................................................... 37
11.3.9
IP Priority Mapping Register ................................................................................. 38
11.3.10
VLAN Priority Mapping Register ........................................................................... 39
11.3.11
CoS Bandwidth Register....................................................................................... 40
11.3.12
Reserved Register ................................................................................................ 40
11.3.13
CoS Configuration Register .................................................................................. 41
11.3.14
Port Mirroring Register.......................................................................................... 42
11.3.15
General Configuration Register ............................................................................ 43
11.3.16
Port VLAN Enable Register .................................................................................. 44
11.3.17
VLAN [Y] Register................................................................................................. 45
11.4
Writing / Reading PHY management registers via EEPROM interface............................. 46
11.4.1
Data Write Register............................................................................................... 46
11.4.2
Physical Layer Device Address Register .............................................................. 46
11.4.3
Physical Layer’s Register Address Register......................................................... 47
11.4.4
IO Status Control Register .................................................................................... 47
11.4.5
Data Read Register .............................................................................................. 48
12 Timing Requirements................................................................................................................................49
12.1
GMII / MII Receive Timing Requirements .......................................................................... 49
12.2
GMII / MII Transmit Timing................................................................................................. 49
12.3
PHY Management (MDIO) Timing ..................................................................................... 50
12.4
EEPROM Timing................................................................................................................ 51
13 Electrical Specifications ............................................................................................................................52
Confidential.
3/53
August 1, 2003
Copyright © 2003, IC Plus Corp.
TC9208M-DS-R06
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