
TC9208M
Preliminary Data Sheet
Pin Listing (continued)
No.
Pin label
Type
Description
C2
RxData0_5
Is
GMII receive data - most significant nibble
C1
RxData0_6
Is
GMII receive data - most significant nibble
D2
RxData0_7
Is
GMII receive data - most significant nibble
U14 Vdd 3.3
P
Digital +3.3V power supply for I/O
U15 Vss 3.3
G
Digital ground for I/O
T1
TxData1_7
O
GMII transmit data - bits 7
R1
TxData1_6
O
GMII transmit data - bits 6
R2
TxData1_5
O
GMII transmit data - bits 5
U13 Vdd 2.0
P
Digital +2.0V power supply for core
R3
TxData1_4
O
GMII transmit data - bits 4
P3
TxData1_3
O
GMII/MII transmit data - bits 3
P2
TxData1_2
O
GMII/MII transmit data - bits 2
R17 Vss 2.0
G
Digital ground for core
TxData1_1
GMII/MII transmit data - bit 1
P1
Priclass1_1
I/Opd
Priority class - most significant bit.
PriClass[1] is latched on reset
TxData1_0
GMII/MII transmit data - least significant bit
N3
PriClass1_0
I/Opu
Priority class - least significant bit. Sets priority level per port basis.
PriClass[1] - '00' - port 1 low priority
PriClass[1] - '01' - port 1 has normal priority
PriClass[1] - '10' - port 1 has high priority
PriClass[1] - '11' - port 1 has very high priority
PriClass[1] is latched on reset
T3
TxEn1
O
GMII/MII transmit enable
M3
GTxClk1
O
GMII transmit clock
P17 Vdd 3.3
P
Digital +3.3V power supply for I/O
T2
TxEr1
I/Opd Transmit Error
N2
TxClk1
I
MII transmit clock
J2
Crs1
Is
MII carrier sense indication
J3
Col1
Is
MII collision indication
N1
RxEr1
Is
Receive Error
L17
Vss 3.3
G
Digital ground for I/O
M2
RxClk1
I
MII receive clock
M1
RxDv1
Is
GMII/MII data valid
J1
RxData1_0
Is
GMII receive data - least significant nibble.
MII receive data
K3
RxData1_1
Is
GMII receive data - least significant nibble.
MII receive data
K2
RxData1_2
Is
GMII receive data - least significant nibble.
MII receive data
M17 Vdd 3.3
P
Digital +3.3V power supply for I/O
K1
RxData1_3
Is
GMII receive data - least significant nibble.
MII receive data
Confidential.
9/53
August 1, 2003
Copyright © 2003, IC Plus Corp.
TC9208M-DS-R06