HM722 datasheet(8/13 Pages) HMSEMI

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Application Notes

LOW INPUT BIAS CURRENT

The H

M72x family is a CMOS op-amp family and features

very low input bias current in pA range. The low input bias

current allows the amplifiers to be used in applications with

high resistance sources. Care must be taken to minimize

PCB Surface Leakage. See below section on “PCB Surface

Leakage” for more details.

PCB SURFACE LEAKAGE

In applications where low input bias current is critical,

Printed Circuit Board (PCB) surface leakage effects need to

be considered. Surface leakage is caused by humidity, dust

or other contamination on the board. Under low humidity

conditions, a typical resistance between nearby traces is

1012Ω. A 5V difference would cause 5pA of current to flow,

which is greater than the H

M72x’s input bias current at

+25

℃ (±1fA, typical). It is recommended to use multi-layer

PCB layout and route the op-amp’s –IN and +IN signal

under the PCB surface.

The effective way to reduce surface leakage is to use a

guard ring around sensitive pins (or traces). The guard ring

is biased at the same voltage as the sensitive pin. An

example of this type of layout is shown in Figure 1 for

Inverting Gain application.

1. For Non-Inverting Gain and Unity-Gain Buffer:

a) Connect the non-inverting pin (+IN) to the input with

a wire that does not touch the PCB surface.

b) Connect the guard ring to the inverting input pin (–

IN). This biases the guard ring to the Common

Mode input voltage.

2. For Inverting Gain and Trans-impedance Gain Amplifiers

(convert current to voltage, such as photo detectors):

a) Connect the guard ring to the non-inverting input

pin (+IN). This biases the guard ring to the same

reference voltage as the op-amp (e.g., VS/2 or

ground).

b) Connect the inverting pin (–IN) to the input with a

wire that does not touch the PCB surface.

GROUND SENSING AND RAIL TO RAIL

The input common-mode voltage range of the H

M72x

series extends 300mV beyond the supply rails. This is

achieved with a complementary input stage—an N-channel

input differential pair in parallel with a P-channel differential

pair. For normal operation, inputs should be limited to this

range. The absolute maximum input voltage is 500mV

beyond the supplies. Inputs greater than the input common-

mode range but less than the maximum input voltage, while

not valid, will not cause any damage to the op-amp. Unlike

some other op-amps, if input current is limited, the inputs

may go beyond the supplies without phase inversion, as

shown in Figure 2. Since the input common-mode range

extends from (VS− −0.3V) to (VS+ + 0.3V), the HM72x op-

amps can easily perform ‘true ground’ sensing.

A topology of class AB output stage with common-source

transistors is used to achieve rail-to-rail output. For light

resistive loads (e.g. 100kΩ), the output voltage can typically

swing to within 5mV from the supply rails. With moderate

resistive loads (e.g. 10kΩ), the output can typically swing to

within 10mV from the supply rails and maintain high open-

loop gain. See the Typical Characteristic curve, Output

Voltage Swing as a function of Output Current, for more

information.

The maximum output current is a function of total supply

voltage. As the supply voltage to the amplifier increases, the

output current capability also increases. Attention must be

paid to keep the junction temperature of the IC below 150

℃

when the output is in continuous short-circuit. The output of

the amplifier has reverse-biased ESD diodes connected to

each supply. The output should not be forced more than

0.5V beyond either supply, otherwise current will flow

through these diodes.

CAPACITIVE LOAD AND STABILITY

The H

M72x can directly drive 1nF in unity-gain without

oscillation. The unity-gain follower (buffer) is the most

sensitive

configuration

capacitive

Direct

capacitive loading reduces the phase margin of amplifiers

and this results in ringing or even oscillation. Applications

that require greater capacitive drive capability should use an

isolation resistor between the output and the capacitive load

like the circuit in Figure 3. The isolation resistor RISO and the

load capacitor CL form a zero to increase stability. The

bigger the RISO resistor value, the more stable VOUT will be.

Note that this method results in a loss of gain accuracy

because RISO forms a voltage divider with the RL.

An improvement circuit is shown in Figure 4. It provides DC

accuracy as well as AC stability. The RF provides the DC

accuracy by connecting the inverting signal with the output.

Figure 1. Use a guard ring around sensitive pins

-1.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

102030405060

TIME (ms)

Figure 2. No Phase Inversion with Inputs Greater Than the

Power-Supply Voltage

VIN

M72x

VOUT

RISO

Figure 3. Indirectly Driving Heavy Capacitive Load

HM721, HM722, HM724

12MHz, High Slew Rate, RRIO CMOS Operational Amplifiers

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