Application Notes

The LPV511 is fabricated with National Semiconductor’s

state-of-the-art VIP50C process.

INPUT STAGE

The LPV511 has a rail-to-rail input which provides more

flexibility for the system designer. As can be seen from the

simplified schematic, rail-to-rail input is achieved by using in

parallel, one PNP differential pair and one NPN differential

pair. When the common mode input voltage (V

V

near V

V

current each differential pair will get. This special logic en-

sures stable and low distortion amplifier operation within the

entire common mode voltage range.

Because both input stages have their own offset voltage

(V

comes a function of V

below V

Performance Characteristics section. Caution should be

taken in situations where the input signal amplitude is com-

parable to the V

accuracy. In these situations, it is necessary for the input

signal to avoid the crossover point.

The input bias current, I

the input crosses the transition region. In addition, param-

eters such as PSRR and CMRR which involve the input

offset voltage will also be affected by changes in V

the differential pair transition region.

Differential input voltage is the difference in voltage between

the non-inverting (+) input and the inverting input (−) of the

op amp. Due to the three series diodes across the two

inputs, the absolute maximum differential input voltage is

amp designs; however, designers should avoid using the

LPV511 as a comparator.

OUTPUT STAGE

supply, which provides the maximum possible dynamic

range at the output. This is particularly important when op-

erating on low supply voltages.

The LPV511 Maximum Output Voltage Swing defines the

maximum swing possible under a particular output load. The

an output load of 100 k

Ω.

DRIVING CAPACITIVE LOAD

The LPV511 is unity gain stable. However, the unity gain

follower is the most sensitive configuration to capacitive

load. Direct capacitive loading reduces the phase margin of

the op amp. When the output is required to drive a large

capacitive load, greater than 100 pF, a small series resistor

at the output of the amplifier improves the phase margin (see

Figure 1).

POWER SUPPLIES AND LAYOUT

The LPV511 operates from a single 2.7V to 12V power

supply. It is recommended to bypass the power supplies with

a 0.1 µF ceramic capacitor placed close to the V

pins.

Ground layout improves performance by decreasing the

amount of stray capacitance and noise at the op amp’s

inputs and outputs. To decrease stray capacitance, minimize

PC board trace lengths and resistor leads, and place exter-

nal components close to the op amps’s pins.

Typical Applications

BATTERY CURRENT SENSING

The rail-to-rail common mode input range and the very low

quiescent current make the LPV511 ideal to use in high side

and low side battery current sensing applications. The high

side current sensing circuit in Figure 2 is commonly used in

a battery charger to monitor the charging current in order to

prevent over charging. A sense resistor R

to the battery directly.

20117025

FIGURE 1. Resistive Isolation of Capacitive Load

20117003

FIGURE 2. High Side Current Sensing

www.national.com

12