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SP8480AS 数据表(PDF) 4 Page - Sipex Corporation |
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SP8480AS 数据表(HTML) 4 Page - Sipex Corporation |
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4 / 12 page ![]() 292 PIN FUNCTION… A 0 — Device Address — Logic low enables 8 MSB read; logic high enables 4 LSB read STATUS — Identifies valid data output; goes to logic high during conversion; goes to logic low when conversion is completed and data is valid R/C — Read/Convert — Initiates conversion on the high-to-low transition; logic low disconnects data bus; logic high initiates read CE — Chip Enable — Logic low disables read or convert; logic high enables read or convert MA 0, MA1, MA2 — MUX Address 0, 1 & 2 — Selects analog input channels CH 0 through CH7 DB 0 through DB11 — Data Outputs — Logic high is binary true; logic low binary false 1 16 234567 8 9 10 11 12 13 14 15 17 23 22 21 20 19 18 24 28 27 26 25 12-BIT ADC 8-CHANNEL MULTIPLEXER DECODE REF MULTIPLEXER TRUTH TABLE MA 2 MA 1 MA 0 OPERATION 00 0 CH O Selected 00 1 CH 1 Selected 01 0 CH 2 Selected 01 1 CH 3 Selected 10 0 CH 4 Selected 10 1 CH 5 Selected 11 0 CH 6 Selected 11 1 CH 7 Selected CONTROL TRUTH TABLE A O R/C OPERATION X H ->L Start Conversion 0 1 Enable 8 MSBs 1 1 Enable 4 LSBs |
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