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i

Ed

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2011/04/14

THine Electronics, Inc.

SW401 Setting

SW

Pin#

*

Def.

NodeName

THC63LVD1023B

IC

Pin#

PinName

* Def. : Default Setting

Description

THEVA12LVDR1020 Mode Setting & LVDS-Cable

350mV

H(open)

TxRS

22

RS

L

Input Clock Triggering Edge Select.

H : Rising edge,

L : Falling edge

H(open) H(open)

VIHM

350mV

N/A

RS=VREFa

SW-Pin#

VIMM

H(open)

L

Small Swing

Input Support

234

RS

LVDS Swing

R/F

2L

1H

21

TxRF

LVDS swing mode, VREF select.

3H

23

TxMODE3

MODE3

H(open)

Input port switching function enable when MODE<1:0>=HL(Single-in/Dual-out Mode).

H or Open: Port switch disable.

L: Port switch enable.

SW-Pin#

RS

67

LVDS mapping table select.

8

200mV

N/A

VILM

a) VREF is Input Reference Voltage.

L

H(open)

6L

5L

4H

Mapping Mode

TxMAP

24

MAP

VIHM

Mapping MODE1

VIMM

H(open)

L

H(open) H(open)

SW

*

Mapping MODE2

L

SW402 Setting

7H

H(open)

8H

H(open)

H(open)

L

* Def. : Default Setting

THC63LVD1023B

VILM

Mapping MODE3

MODE1

L

L

Dl Li k(Dl i /Si l

t)

Single Link(Single-in/Dual-out)

Dual Link(Dual-in/Single-out)

MODE0

SW

Pin# Def.

NodeName

Pixel Data Mode.

PinName

1H

25

HL

MODE1

MODE0

Description

H

TxMODE1

H

H

Single Link(Single-in/Single-out)

L

2H

26

TxMODE0

IC

Pin#

Mode

L

L

Dual Link(Dual-in/Single-out)

L

3TxMODE2

The use of these multi-function depends on the setting of MODE<1:0> or ASYNC.

ASYNC=H(MODE<1:0>=Don't care.)

H: Cross point switching enable.

L: Cross point switching disable.

ASYNC=L

MODE<1:0>=HH(Single-in/Single-out Mode)

H: Distribution function enable.

L: Distribution function disable.

MODE<1:0>=HL(Single-in/Dual-out Mode)

MODE2

27

PRBS(Pseudo-Random Binary Sequence) generator is active in order to evaluate eye patterns

Asynchronous function enable.

H : Asynchronous mode enable.(MODE<1:0>=Disable)

L : Asynchronous mode disable.(MODE<1:0>=Enable)

H: Normal operation,

L: Power down (all outputs are Hi-Z)

TxPDWN

5H

4L

28

30

/PDWN

TxASYNC

ASYNC

MODE<1:0> HL(Single in/Dual out Mode)

H: DDR (Double Edge input) function enable.

L: DDR (Double Edge input) function disable.

PRBS(Pseudo-Random Binary Sequence) generator is active in order to evaluate eye patterns

when MODE<1:0> = LL(Dual-in/Dual-out mode) or ASYNC=H

H: PRBS generator is enable.

L: Normal Operation

Must be tied to GND.

Must be Open.

Reserved

8H

33

N/C

7L

32

TxTEST1

TxPRBS

6

Copyright© 2011 THine Electronics Inc

2/5

THEVA12LVDR1020 manual Rev 1 00 E

TxTEST2

L31

PRBS

Copyright© 2011 THine Electronics, Inc.

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THEVA12LVDR1020_manual_Rev.1.00_E