CFA633-RDI-KS datasheet(2/88 Pages) CRYSTAIFONTZ

2 / 88 page

Crystalfontz America, Inc.

Data Sheet Release Date 2012/02/21

www.crystalfontz.com

CFA633-RDI-KS LCD Module (Hardware v2.0 / Firmware s2v1)

February 2012

Page 2

DATA SHEET REVISION HISTORY

For information about firmware and hardware revisions, see the Part Change Notifications (PCNs) under “News” in our

website’s navigation bar. To see the most recent PCN for the CFA633 family at the time of this Data Sheet release, see

PCN #10402.

Data Sheet version:

2012/02/21



Added section on Accessories (Pg. 12).This section includes some useful Crystalfontz cables

in Buy Cables Separately (Pg. 13).



Illustration for Keypad Detail Drawing (Pg. 18) was improved to include more dimensions.



Added section on DC Characteristics (Pg. 24).



Added section on LED BACKLIGHT INFORMATION (Pg. 24). Please read this important

information.



In command 1 (0x01): Get Hardware & Firmware Version (Pg. 38), changed revision numbers

from

data[] = "CFA633:hX.X,yYvY"

XvX is the hardware revision, "2.0" for example

YvY is the firmware version, "

.0" for example

data[] = "CFA633:h#.#,y#v#"

X.X is the hardware revision, "h2.0" for example

Y.Y is the firmware version, "s2v1" for example



In command 4 (0x04): Store Current State As Boot State (Pg. 39), added the following note: “If

the current state and the boot state do not match after saving, the module will return an error

instead of an ACK. In this unlikely error case, the boot state will be undefined.”



Command 10 (0x0A): Read 8 Bytes of LCD Memory (Pg. 43), corrected “data[0] is the

address code native to the LCD controller”

from

0x80 (\128) to 0x93 (\147) for DDRAM, line 1

0xC0 (\192) to 0xD3 (\211) for DDRAM, line 2

0x80 (\128) to 0x8F (\143) for DDRAM, line 1

0xC0 (\192) to 0xCF (\207) for DDRAM, line 2



In command 28 (0x1C): Set ATX Power Switch Functionality (Pg. 54), changed description to

reflect enhancement in firmware. From PCN #10402, “Added auto polarity switch. Improved

pulse length functionality, and added feature to hold until system off during power down.” Also

corrected “data[1]: (optional) length of power on & off pulses in 1/32 second“

from

255 = 8 sec

254 = pulse length

255 = pin held until power drops (length of time pin is held in active

state)



In Module Reliability (Pg. 63), please read important note added to the top of this section. Also,

we increased backlight specification from “70%” to “90%”.



In Algorithm 2B: “C” Improved Bit Shift Implementation (Pg. 74), added closing } to final line.



Additional minor text changes were made to make text easier to understand.

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