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SSM3K36FS 数据表(PDF) 2 Page - Toshiba Semiconductor

部件名 SSM3K36FS
功能描述  TOSHIBA Field-Effect Transistor Silicon N Channel MOS Type
PDF  5 Pages
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

SSM3K36FS 数据表(HTML) 2 Page - Toshiba Semiconductor

  SSM3K36FS Datasheet HTML 1Page - Toshiba Semiconductor SSM3K36FS Datasheet HTML 2Page - Toshiba Semiconductor SSM3K36FS Datasheet HTML 3Page - Toshiba Semiconductor SSM3K36FS Datasheet HTML 4Page - Toshiba Semiconductor SSM3K36FS Datasheet HTML 5Page - Toshiba Semiconductor  
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SSM3K36FS
2014-03-01
2
Electrical Characteristics (Ta = 25°C)
Characteristics
Symbol
Test Conditions
Min
Typ.
Max
Unit
V (BR) DSS
ID = 1 mA, VGS = 0
20
⎯
⎯
Drain-source breakdown voltage
V (BR) DSX
ID = 1 mA, VGS = - 10 V
12
⎯
⎯
V
Drain cutoff current
IDSS
VDS =20 V, VGS = 0
⎯
⎯
1
μA
Gate leakage current
IGSS
VGS = ±10 V, VDS = 0
⎯
⎯
±1
μA
Gate threshold voltage
Vth
VDS = 3 V, ID = 1 mA
0.35
⎯
1.0
V
Forward transfer admittance
|Yfs|
VDS = 3 V, ID = 200 mA
(Note2)
420
840
⎯
mS
ID = 200 mA, VGS = 5.0 V (Note2)
⎯
0.46
0.63
ID = 200 mA, VGS = 4.5 V (Note2)
⎯
0.51
0.66
ID = 200 mA, VGS = 2.5 V (Note2)
⎯
0.66
0.85
ID = 100 mA, VGS = 1.8 V (Note2)
⎯
0.81
1.14
Drain-source ON-resistance
RDS (ON)
ID = 50 mA, VGS = 1.5 V
(Note2)
⎯
0.95
1.52
Ω
Input capacitance
Ciss
⎯
46
⎯
Output capacitance
Coss
⎯
10.8
⎯
Reverse transfer capacitance
Crss
VDS = 10 V, VGS = 0, f = 1 MHz
⎯
7.3
⎯
pF
Total Gate Charge
Qg
⎯
1.23
⎯
Gate
−Source Charge
Qgs
⎯
0.60
⎯
Gate
−Drain Charge
Qgd
VDS = 10V, ID = 0.5 A, VGS = 4.0 V
⎯
0.63
⎯
nC
Turn-on time
ton
⎯
30
⎯
Switching time
Turn-off time
toff
VDD = 10 V, ID = 200 mA
VGS = 0 to 2.5 V, RG = 50 Ω
⎯
75
⎯
ns
Drain-source forward voltage
VDSF
ID = -0.5 A, VGS = 0 V
(Note2)
⎯
-0.88
-1.2
V
Note2: Pulse test
Switching Time Test Circuit
Usage Considerations
Let Vth be the voltage applied between gate and source that causes the drain current (ID) to below (1 mA for the
SSM3K36FS). Then, for normal switching operation, VGS(on) must be higher than Vth, and VGS(off) must be lower than
Vth. This relationship can be expressed as: VGS(off) < Vth < VGS(on).
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
2.5 V
ton
toff
(c) VOUT
0 V
VDD
VDS (ON)
tr
tf
10%
90%
90%
10%
(a) Test Circuit
VDD = 10 V
RG = 50 Ω
Duty
≤ 1%
VIN: tr, tf < 5 ns
Common Source
Ta
= 25°C
0
2.5 V
IN
OUT
VDD
10
μs
(b) VIN



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