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56F8167 数据表(PDF) 11 Page - Freescale Semiconductor, Inc

部件名 56F8167
功能描述  16-bit Digital Signal Controllers
PDF  184 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

56F8167 数据表(HTML) 11 Page - Freescale Semiconductor, Inc

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Architecture Block Diagram
56F8367 Technical Data, Rev. 7.0
Freescale Semiconductor
11
Preliminary
Figure 1-1 System Bus Interfaces
Note:
Flash memories are encapsulated within the Flash Memory (FM) Module. Flash control is
accomplished by the I/O to the FM over the peripheral bus, while reads and writes are completed
between the core and the Flash memories.
Note:
The primary data RAM port is 32 bits wide. Other data ports are 16 bits.
56800E
Program
Flash
Data RAM
EMI
Data Flash
IPBus
Bridge
Boot
Flash
Flash
Memory
Module
CHIP
TAP
Controller
TAP
Linking
Module
JTAG / EOnCE
5
24
pdb_m[15:0]
pab[20:0]
cdbw[31:0]
xab1[23:0]
cdbr_m[31:0]
xab2[23:0]
xdb2_m[15:0]
IPBus
External JTAG
Port
To Flash
Control Logic
Address
Data
Control
16
10
NOT available on the 56F8167 device.
Program
RAM



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