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TPS16632RGET 数据表(PDF) 23 Page - Texas Instruments |
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TPS16632RGET 数据表(HTML) 23 Page - Texas Instruments |
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23 / 43 page ![]() PGOOD IIN VOUT SHDN PGOOD IIN VOUT SHDN 23 TPS1663 www.ti.com SLVSET9D – SEPTEMBER 2018 – REVISED AUGUST 2019 Product Folder Links: TPS1663 Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated Feature Description (continued) VIN = 24 V C(dVdT) = 22 nF RLOAD = 24 Ω Figure 27. Turnon Control With SHDN VIN = 24 V C(dVdT) = 22 nF RLOAD = 24 Ω Figure 28. Turnoff Control With SHDN 9.4 Device Functional Modes The TPS1663x devices respond differently to overload with MODE pin configurations. The operational differences are explained in Table 1. Table 1. Device Operational Differences Under Different MODE Configurations MODE Pin Configuration Power Limiting, Over Current fault and Thermal Shutdown Operation Open Active Current limiting for a maximum duration of tCL_PLIM(dly). There after Latches OFF. Latch reset by toggling SHDN or UVLO low to high or power cycling IN Shorted to GND Active Current limiting for a maximum duration of tCL_PLIM(dly). There after auto-retries after a delay of t(TSD_retry). |
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