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STUSB4500LBJR 数据表(PDF) 15 Page - STMicroelectronics |
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STUSB4500LBJR 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 31 page ![]() 6 Application The sections below are not part of the ST product specifications. They are intended to give a generic application overview to be used by the customer as a starting point for further implementation and customization. ST does not warrant compliance with customer specifications. Full system implementation and validation are under the customer’s responsibility. 6.1 General information 6.1.1 Power supplies The STUSB4500L can be supplied in three different ways depending on the targeted application: • Through the VDD pin only for applications powered by VBUS that operate with dead battery mode support • Through the VSYS pin only for AC powered applications with a system power supply delivering from 3.3 V up to 5 V • Through the VDD and VSYS pins either for applications powered by a battery with dead battery mode support or for applications powered by VBUS with a system power supply delivering 3.3 V or 5 V. When both VDD and VSYS power supplies are present, the low power supply VSYS is selected when VSYS voltage is above 3.1 V. Otherwise VDD is selected When possible, please prefer VDD supply only, and connect it to VBUS in order to minimize application power consumption. In this case, VSYS is not used and must be connected to GND. 6.1.2 Connection to MCU or application processor The STUSB4500L connection to an MCU or an application processor is optional. However, an I²C interface with an interrupt allows a simple connection to most of MCU and SOC of the market. When a connection through the I²C interface is implemented, it provides an extensive functionality during the system operation. For instance, it may be used to: 1. Define the port configuration during system boot (in case the NVM parameters are not customized during manufacturing) 2. Provide a diagnostic of the Type-C connection in real time At power-up or after a reset, the first software access to the I2C registers of the STUSB4500L can be done only after TLOAD as shown in the figure below. TLOAD corresponds to the time required to initialize the I2C registers with the default values from the embedded NVM. At power-up, the loading phase starts when the voltage level on the VREG_1V2 output pin of the 1.2 V internal regulator reaches 1.08 V to release the internal POR signal. After a reset, the loading phase starts when the signal on the RESET pin is released. Figure 7. I2C register initialization sequence at power-up or after a reset Power On Reset I2C registers loading from NVM I2C access TLOAD VSYS or VDD VREG_1V2 POR I2C (SCL,SDA) 1.08 V Reset I2C registers loading from NVM I2C access TLOAD VSYS or VDD VREG_1V2 RESET I2C (SCL,SDA) At power-up After a reset STUSB4500L Application DS13102 - Rev 1 page 15/31 |
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