PUSB3F97

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Nexperia B.V. 2017. All rights reserved.

Product data sheet

Rev. 1 —

10 May 2017

4 of 14

Nexperia

PUSB3F97

ESD protection for ultra high-speed interfaces

differential mode

Fig 1.

Insertion loss; typical values

Fig 2.

Relative capacitance as a function of input

voltage; typical values

Sdd21 normalized to 100

;

differential pairs CH1/CH2 versus CH3/CH4

(1) PUSB3F97 on reference board

(2) Reference board without device under test (DUT)

Fig 3.

Crosstalk; typical values

Fig 4.

Differential Time Domain Reflectometer (TDR)

plot; typical values

a

C

line

C

line V

I

0 V

=



---------------------------------

=