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CS42436 数据表(PDF) 9 Page - Cirrus Logic |
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CS42436 数据表(HTML) 9 Page - Cirrus Logic |
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9 / 66 page ![]() DS647PP2 9 2 PIN DESCRIPTIONS - HARDWARE MODE Pin Name # Pin Description AIN5_MUX AIN6_MUX 1 2 Analog Input Multiplexer (Input) - Allows selection between the A and B single-ended inputs of ADC3. See sections 7.6.7 and 7.6.8 for details. MFREQ 3 MCLK Frequency (Input) - Sets the required frequency range of the input Master Clock. See sec- tion 5.4 for the appropriate settings. ADC3_HPF 4 ADC3 High-Pass Filter Freeze (Input) - When this pin is driven high, the internal high-pass filter will be disabled for ADC3.The current DC offset value will be frozen and continue to be subtracted from the conversion result. See “ADC Digital Filter Characteristics” on page 16. RST 5 Reset (Input) - The device enters a low power mode and all internal registers are reset to their default settings when low. VLC 6 Control Port Power (Input) - Determines the required signal level for the control port interface. See “Digital I/O Pin Characteristics” on page 7. FS 7 Frame Sync (Input) - Signals the start of a new TDM frame in the TDM digital interface format. VD 8 Digital Power (Input) - Positive power supply for the digital section. VLS 10 Serial Port Interface Power (Input) - Determines the required signal level for the serial port inter- faces. SCLK 11 Serial Clock (Input) - Serial clock for the serial audio interface. Input frequency must be 256xFs. ADC_SDOUT/ ADC3_SINGLE 13 Serial Audio Data Output (Output) - TDM output for two’s complement serial audio data. Start-up Option for Hardware Mode: Pull-up to VLS enables Single-Ended Mode for AIN5-AIN6. DAC_SDIN 14 DAC Serial Audio Data Input (Input) - Input for two’s complement serial audio data. AUX_LRCK 15 Auxiliary Left/Right Clock (Output) - Determines which channel, Left or Right, is currently active on the Auxiliary serial audio data line. AIN5_MUX 6 2 4 8 10 1 3 5 7 9 11 12 14 15 16 17 18 19 20 21 2 2 23 24 25 33 37 35 31 29 38 36 34 32 30 28 27 52 51 50 49 48 47 46 45 4 4 43 42 41 VLS FS MCLK VLC ADC3_HPF N.C. AOUT5+ AGND VA ADC_SDOUT/ ADC3_SINGLE MFREQ RST AOUT6+ DGND VD SCLK VQ AOUT6- 13 AIN6_MUX 26 39 AOUT5- 40 N.C. N.C. N.C. AIN1+ AIN1- CS42436 |
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