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OPA607 数据表(PDF) 11 Page - Texas Instruments |
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OPA607 数据表(HTML) 11 Page - Texas Instruments |
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11 / 28 page ![]() Bias + ± RF OPA607 Signal and bias to next stage Gain × VSIG VSIG 5 V VOUT Signal and bias from previous stage RG Gain × Bias + ± RF OPA607 2.5 V VOUT RG -2.5 V Signal and bias to next stage Gain × VSIG Gain × Bias Bias VSIG Signal and bias from previous stage 11 OPAX607 www.ti.com SBOS981B – OCTOBER 2019 – REVISED FEBRUARY 2020 Product Folder Links: OPAX607 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated 8.4 Device Functional Modes The OPAX607 has two functional modes: normal operating mode and power-down (PD) mode. 8.4.1 Normal Operating Mode The OPAX607 is operational when the power-supply voltage is between 2.2 V (±1.1 V) and 5.5 V (±2.75 V). Most newer systems use a single power supply to improve efficiency and simplify the power tree design. The OPAX607 can be used with a single-supply power (VS– connected to GND) with no change in performance from split supply, as long as the input and output pins are biased within the linear operating region of the device. The valid input and output voltage ranges are given in the Electrical Characteristics table. The outputs nominally swing rail-to-rail with approximately 10-mV headroom required for linear operation. The inputs can typically swing up to the negative rail (typically ground) and to within 1.1 V from the positive supply. Figure 3 shows changing from a ±2.5-V split supply to a 5-V single-supply. Figure 3. Single-Supply and Dual-Supply Operation 8.4.2 Power-Down Mode The OPAX607 features a power-down mode for power critical applications. Under logic control, the amplifier can be switched from normal operation (consuming ≤ 1 mA) to a power-down current of less than 1 µA. When the PD pin is connected high, the amplifier is active. Connecting the PD pin to logic low disables the amplifier and places the output in a high-impedance state. The output of an op amp is high impedance similar to a tri-state high- impedance gate under a power-down condition; however, the feedback network behaves as a parallel load. If the power-down mode is not used, connect PD to the positive supply pin or leave floating. See the Power Down (Device Enabled When Floating) section in the Electrical Characteristics table for the enable and disable threshold voltages. The PD pin can be left floating to keep the op amp always enabled, which is primarily possible because of the presence of an internal pullup resistor within the op amp that, by default, always keeps the PD pin weakly tied to VS+. However it is perfectly also acceptable to strengthen the pull up from PD pin by connecting a low value resistance from PD pin to VS+. This shall help make the part less susceptibly to noise/transient pick up on the PD pin. The PD logic states are transistor-transistor logic (TTL) with reference to the negative supply rail, VS-. When the op amp is powered from a single supply and ground, driving from logic devices with similar VS+ voltages to the op amp does not require any special consideration. When the op amp is powered from a split supply, VS- is below ground and an open-collector type of interface with a pullup resistor is more appropriate. |
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