STM32MP151AAB3 datasheet(169/253 Pages) STMICROELECTRONICS

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DS12500 Rev 3

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STM32MP151A/D

Electrical characteristics

232

6.3.18

NRST and NRST_CORE pin characteristics

The NRST and NRST_CORE pins input driver uses CMOS technology. It is connected to a

permanent pull-up resistor, RPU (see Table 50: I/O static characteristics).

Unless otherwise specified, the parameters given in Table 56 are derived from tests

performed under the ambient temperature and VDD supply voltage conditions summarized

in Table 13: General operating conditions.

Fmax(2)

Maximum frequency

C = 50 pF, 1.71 V ≤ VDD ≤ 2.7 V

MHz

C = 30 pF, 1.71 V ≤ VDD ≤ 2.7 V

C = 20 pF, 1.71 V ≤ VDD ≤ 2.7 V

C = 10 pF, 1.71 V ≤ VDD ≤ 2.7 V

100

tr/tf(3)

Output high to low level

fall time and output low

to high level rise time

C = 50 pF, 1.71 V ≤ VDD ≤ 2.7 V

6.1

C = 30 pF, 1.71 V ≤ VDD ≤ 2.7 V

4.7

C = 20 pF, 1.71 V ≤ VDD ≤ 2.7 V

3.9

C = 10 pF, 1.71 V ≤ VDD ≤ 2.7 V

Fmax(2)

Maximum frequency

C = 50 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-68

MHz

C = 30 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-95

C = 20 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-118

C = 10 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-162

tr/tf(3)

Output high to low level

fall time and output low

to high level rise time

C = 50 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-4.9

C = 30 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-3.5

C = 20 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-2.8

C = 10 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-2.1

Fmax(2)

Maximum frequency

C = 50 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-80

MHz

C = 30 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-121

C = 20 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-162

C = 10 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-245

tr/tf(3)

Output high to low level

fall time and output low

to high level rise time

C = 50 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-4.2

C = 30 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-2.8

C = 20 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-2.1

C = 10 pF, 1.71 V ≤ VDD ≤ 2.7 V(4)

-1.4

1. Guaranteed by design.

2. The maximum frequency is defined with the following conditions: (tr+tf) ≤ 2/3, skew ≤ 1/20 T and 45% < Duty cycle < 55%.

3. The fall and rise times are defined between 90% and 10% and between 10% and 90% of the output waveform,

respectively.

4. Compensation system enabled.

Table 55. Output timing characteristics (HSLV ON, _e IO structure)(1) (continued)

Speed

Symbol

Parameter

conditions

Min

Max

Unit

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