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STM32MP151AAB3 数据表(PDF) 182 Page - STMicroelectronics |
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STM32MP151AAB3 数据表(HTML) 182 Page - STMicroelectronics |
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182 / 253 page  Electrical characteristics STM32MP151A/D 182/253 DS12500 Rev 3 Figure 31. Synchronous non-multiplexed NOR/PSRAM read timings FMC_CLK FMC_NEx FMC_A[25:0] FMC_NOE FMC_D[15:0] D1 D2 FMC_NWAIT (WAITCFG = 1b, WAITPOL + 0b) FMC_NWAIT (WAITCFG = 0b, WAITPOL + 0b) tw(CLK) tw(CLK) Data latency = 0 td(CLKL-NExL) td(CLKH-NExH) td(CLKL-AV) td(CLKH-AIV) td(CLKL-NOEL) td(CLKH-NOEH) tsu(DV-CLKH) th(CLKH-DV) tsu(DV-CLKH) th(CLKH-DV) tsu(NWAITV-CLKH) th(CLKH-NWAITV) tsu(NWAITV-CLKH) t h(CLKH-NWAITV) tsu(NWAITV-CLKH) th(CLKH-NWAITV) MS32759V1 FMC_NADV td(CLKL-NADVL) td(CLKL-NADVH) Table 67. Synchronous non-multiplexed NOR/PSRAM read timings(1) Symbol Parameter Min Max Unit tw(CLK) FMC_CLK period R×Tfmc_ker_ck-1(2) - ns t(CLKL-NExL) FMC_CLK low to FMC_NEx low (x=0..2) - 1 td(CLKH-NExH) FMC_CLK high to FMC_NEx high (x= 0…2) R×Tfmc_ker_ck/2+0.5(2) - td(CLKL-NADVL) FMC_CLK low to FMC_NADV low - 1.5 td(CLKL-NADVH) FMC_CLK low to FMC_NADV high 1 - td(CLKL-AV) FMC_CLK low to FMC_Ax valid (x=16…25) - 1 td(CLKH-AIV) FMC_CLK high to FMC_Ax invalid (x=16…25) R×Tfmc_ker_ck/2+1.5(2) - td(CLKL-NOEL) FMC_CLK low to FMC_NOE low - 2 td(CLKH-NOEH) FMC_CLK high to FMC_NOE high R×Tfmc_ker_ck/2+1.5(2) - tsu(DV-CLKH) FMC_D[15:0] valid data before FMC_CLK high 3 - th(CLKH-DV) FMC_D[15:0] valid data after FMC_CLK high 1 - t(NWAIT-CLKH) FMC_NWAIT valid before FMC_CLK high 3 - th(CLKH-NWAIT) FMC_NWAIT valid after FMC_CLK high 1.5 - 1. Guaranteed by characterization results. |
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