STM32MP151AAB3 datasheet(191/253 Pages) STMICROELECTRONICS

191 / 253 page

DS12500 Rev 3

191/253

STM32MP151A/D

Electrical characteristics

232

tCAL

Offset and linearity

calibration time

16384

1/fADC

tOFF_CAL Offset calibration time

1280

tLATR

Trigger conversion latency

for regular and injected

channels without aborting

the conversion

CKMODE = 00

1.5

2.5

CKMODE = 01

2.5

CKMODE = 10

2.5

CKMODE = 11

2.25

tLATRINJ

Trigger conversion latency

for regular and injected

channels when a regular

conversion is aborted

CKMODE = 00

2.5

3.5

CKMODE = 01

3.5

CKMODE = 10

3.5

CKMODE = 11

3.25

Sampling time

1.5

810.5

tCONV

Total conversion time

(including sampling time)

N-bit resolution

ts + N/2(4)

IDDA(ADC)

ADC consumption from

VDDA supply (differential)

FS = 3.6 Msps, BOOST = 1

1900

μA

FS = 1 Msps, BOOST = 0

460

IDDA(REF)

ADC consumption from

VREF+ (differential)

FS = 3.6 Msps, BOOST = 1

260

FS = 1 Msps, BOOST = 0

140

IDDA(ADC)

ADC consumption from

VDDA supply (single-ended)

FS = 3.6 Msps, BOOST = 1

1700

FS = 1 Msps, BOOST = 0

445

IDDA(REF)

ADC consumption from

VREF+ supply (single-

ended)

FS = 3.6 Msps, BOOST = 1

160

FS = 1 Msps, BOOST = 0

1. Guaranteed by design.

2. Voltage BOOSTER on ADC switches must be used for VDDA < 2.4 V (switches inside IO).

3. Depending on the package, VREF- can be internally connected to VSSA.

4. 9 to 818 cycles @ 14-bit mode.

Table 74. ADC characteristics(1)(2) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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