STM32MP151AAB3 datasheet(188/253 Pages) STMICROELECTRONICS

部件名	STM32MP151AAB3

功能描述	Arm® Cortex®-A7 800 MHz Cortex®-M4 MPU, TFT, 35 comm. interfaces, 25 timers, adv. analog

PDF	253 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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188 / 253 page

Electrical characteristics

STM32MP151A/D

188/253

DS12500 Rev 3

Figure 37. QUADSPI timing diagram - SDR mode

Figure 38. QUADSPI timing diagram - DDR mode

Table 72. QUADSPI characteristics in DDR mode

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fck1/t(CLK)

QUADSPI clock

frequency

2.7 V < VDD < 3.6 V

CL=20 pF

MHz

1.71 V < VDD < 3.6 V

CL=15 pF

tw(CLKH)

QUADSPI clock high and

low time

-t(CLK)/2 - 0.5

t(CLK)/2 + 0.5

tw(CLKL)

-t(CLK)/2 - 0.5

t(CLK)/2 + 0.5

tsr(IN), tsf(IN) Data input setup time

0.5

thr(IN), thf(IN) Data input hold time

2.75

tvr(OUT),

tvf(OUT)

Data output valid time

DHHC = 0

1.5

DHHC = 1

Pres = 1, 2...

-t(CLK)/4+1

t(CLK)/4+1.5

thr(OUT),

thf(OUT)

Data output hold time

DHHC = 0

DHHC = 1

Pres = 1, 2...

t(CLK)/4

MSv36878V2

Data output

IO0

IO1

IO2

Clock

Data input

IO0

IO1

IO2

t(CLK)

tw(CLKH)

tw(CLKL)

tr(CLK)

tf(CLK)

ts(IN)

th(IN)

tv(OUT)

th(OUT)

MSv36879V3

Data output

IO0

IO2

IO4

Clock

Data input

IO0

IO2

IO4

t(CLK)

tw(CLKH)

tw(CLKL)

tr(CLK)

tf(CLK)

tsf(IN) thf(IN)

tvf(OUT)

thr(OUT)

IO1

IO3

IO5

IO1

IO3

IO5

tvr(OUT)

thf(OUT)

tsr(IN) thr(IN)

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