AS8846 datasheet(21/35 Pages) AMSCO

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Data Sheet AS8446

Revision 1.8, Date 2005-03-17

Page 21 of 35

Failure Registers and Test Mode Register (on chip temperature detection)

R18<7:0>

FAILURE_STAT

R18<0>

à Poverc

(bit 0 contains the over current status)

R18<1>

à PVover

(bit 1 contains the over voltage status of Vbat)

R18<2>

à PVunder

(bit 2 contains the under voltage status of Vbat)

R18<3>

à PTover_in

(bit 3 contains the on chip over temperature status)

R18<4>

à PTover_ex

(bit 4 contains the external over temperature status)

R18<5>

à VDDover

(bit 5 contains the over voltage status of VDD, 5 V)

R18<6>

à VDDunder

(bit 6 contains the under voltage status of VDD, 5 V)

R18<7> = 0

band gap Voltage is the reference voltage for the

on chip over temperature detection (normal function)

R18<7> = 1

the voltage at pin TP is the reference voltage for

the on chip over temperature detection (test mode)

Registers R18<6:0>

set and reset by Three-Wire Interface and only

set by corresponding failure detection units

(Three Wire-Interface has write priority)

read by Three-Wire Interface and corresponding

logic

write by Three-Wire Interface only

read by Three-Wire Interface and corresponding

analog switch

TEMP_TEST

VDDunder

VDDover

PTover_ex

PTover_in

PVunder

PVover

Poverc

000

start up values

Table 14

Summary of the programming capabilities of the AS 8446

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