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PIMD2 数据表(PDF) 4 Page - NXP Semiconductors |
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PIMD2 数据表(HTML) 4 Page - NXP Semiconductors |
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4 / 10 page ![]() 2004 Apr 21 4 Philips Semiconductors Product specification NPN/PNP resistor-equipped transistors; R1 = 22 k Ω, R2 = 22 kΩ PEMD2; PIMD2; PUMD2 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). Notes 1. Refer to standard mounting conditions. 2. Reflow soldering is the only recommended soldering method. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT Per transistor; for the PNP transistor with negative polarity VCBO collector-base voltage open emitter − 50 V VCEO collector-emitter voltage open base − 50 V VEBO emitter-base voltage open collector − 10 V VI input voltage TR1 positive − +40 V negative −−10 V VI input voltage TR2 positive − +10 V negative −−40 V IO output current (DC) − 100 mA ICM peak collector current − 100 mA Ptot total power dissipation Tamb ≤ 25 °C SOT363 note 1 − 200 mW SOT457 note 1 − 300 mW SOT666 notes 1 and 2 − 200 mW Tstg storage temperature −65 +150 °C Tj junction temperature − 150 °C Tamb operating ambient temperature −65 +150 °C Per device Ptot total power dissipation Tamb ≤ 25 °C SOT363 note 1 − 300 mW SOT457 note 1 − 600 mW SOT666 notes 1 and 2 − 300 mW |
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