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PI3DPX1202A

Document number: DS40115 Rev.2-1

Power-up/down and Hot Plug Detect (HPD)

Following power on, state machine enter Reset State. Chip is powered down. HPD startup oscillator and Bandgap and Digital VDD

regulator is on.

After Power-On-Reset (POR) de-asserted, state machine enter "Low Power Mode 1" and then 2-ms later enter "Low Power Mode 2"

and monitor HPD_SINK.

When HPD_SINK is asserted, the state will change from "Low Power State 2" to "Active state". In Active stage, 1.2V regulator is

turned on. When 1.2V POR detects valid voltage, RX and TX section of the channel will power on.

In Active state, if HPD_SINK=0, then it will go to wait state and initiate debounce timer, if HPD_SINK is still=0 after 300ms, this

signal a HPD reset and the state machine goes to the "Low Power mode 2" state. If HPD_SINK reverts back to 1 (High) within

300ms, then the controller will return active state. All circuits blocks are active in both active and wait state.

HPD_SNK=?

Start

Power On Reset

ST_POR

Low Power Mode

ST_LPM1

Low Power Mode

ST_LPM2

Active Mode

ST_ACT

Active Wait

ST_WAIT

= 300ms

0

HPD = 0

HPD=1

HPD=0

HPD=1

HPD detect = ON

Figure 4-5: Power up sequence flow chart