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LSM9DS1TR 数据表(PDF) 53 Page - STMicroelectronics |
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LSM9DS1TR 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 72 page ![]() DocID025715 Rev 3 53/72 LSM9DS1 Accelerometer and gyroscope register description 72 7.26 CTRL_REG8 (22h) Control register 8. Table 70. CTRL_REG7_XL register description HR High resolution mode for accelerometer enable. Default value: 0 (0: disabled; 1: enabled). Refer to Table 71 DCF[1:0] Accelerometer digital filter (high pass and low pass) cutoff frequency selection: the band- width of the high-pass filter depends on the selected ODR. Refer to Table 71 FDS Filtered data selection. Default value: 0 (0: internal filter bypassed; 1: data from internal filter sent to output register and FIFO) HPIS1 High-pass filter enabled for acceleration sensor interrupt function on Interrupt. Default value: 0 (0: filter bypassed; 1: filter enabled) Table 71. Low pass cutoff frequency in high resolution mode (HR = 1) HR CTRL_REG7 (DCF [1:0]) LP cutoff freq. [Hz] 1 00 ODR/50 1 01 ODR/100 1 10 ODR/9 1 11 ODR/400 Table 72. CTRL_REG8 register BOOT BDU H_LACTIVE PP_OD SIM IF_ADD_INC BLE SW_RESET Table 73. CTRL_REG8 register description BOOT Reboot memory content. Default value: 0 (0: normal mode; 1: reboot memory content(1)) 1. Boot request is executed as soon as internal oscillator is turned-on. It is possible to set bit while in power- down mode, in this case it will be served at the next normal mode or sleep mode. BDU Block data update. Default value: 0 (0: continuous update; 1: output registers not updated until MSB and LSB read) H_LACTIVE Interrupt activation level. Default value: 0 (0: interrupt output pins active high; 1: interrupt output pins active low) PP_OD Push-pull/open-drain selection on the INT1_A/G pin and INT2_A/G pin. Default value: 0 (0: push-pull mode; 1: open-drain mode) SIM SPI serial interface mode selection. Default value: 0 (0: 4-wire interface; 1: 3-wire interface). IF_ADD_INC Register address automatically incremented during a multiple byte access with a serial interface (I2C or SPI). Default value: 1 (0: disabled; 1: enabled) BLE Big/Little Endian data selection. Default value 0 (0: data LSB @ lower address; 1: data MSB @ lower address) SW_RESET Software reset. Default value: 0 (0: normal mode; 1: reset device) This bit is cleared by hardware after next flash boot. |
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